US10363629B2ActiveUtilityA1

Mitigation of particle contamination for wafer dicing processes

86
Assignee: APPLIED MATERIALS INCPriority: Jun 1, 2017Filed: Jun 1, 2017Granted: Jul 30, 2019
Est. expiryJun 1, 2037(~10.9 yrs left)· nominal 20-yr term from priority
H10P 72/7416H10P 72/744H10P 72/742H10P 72/7402H10P 72/0442H10P 72/0428H10P 70/20H10P 54/00H10P 50/692H10P 50/242H10W 10/00H10W 10/01B23K 26/18B23K 2103/56B23K 26/364B23K 26/0661B23K 2101/42B23K 2103/50B23K 26/0624B23K 26/402H01L 21/3065H01L 21/67092H01L 21/3081H01L 21/78H01L 21/02057H01L 21/67132H01L 21/6836
86
PatentIndex Score
3
Cited by
91
References
21
Claims

Abstract

Methods of dicing semiconductor wafers are described. In an example, a method of dicing a wafer having a plurality of integrated circuits thereon involves dicing the wafer into a plurality of singulated dies disposed above a dicing tape. The method also involves forming a material layer over and between the plurality of singulated dies above the dicing tape. The method also includes expanding the dicing tape, wherein a plurality of particles is collected on the material layer during the expanding.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
       1. A method of dicing a wafer having a plurality of integrated circuits thereon, the method comprising:
 dicing the wafer into a plurality of singulated dies disposed above a dicing tape; 
 subsequent to dicing the wafer into the plurality of singulated dies, forming a material layer over and between the plurality of singulated dies above the dicing tape; and 
 expanding the dicing tape, wherein a plurality of particles is collected on the material layer during the expanding. 
 
     
     
       2. The method of  claim 1 , wherein a source of the plurality of particles is a portion of the wafer surrounding the plurality of singulated dies. 
     
     
       3. The method of  claim 1 , further comprising:
 removing the material layer and the plurality of particles with a liquid medium. 
 
     
     
       4. The method of  claim 3 , wherein the material layer is a water soluble material layer, and the material layer and the plurality of particles are removed with an aqueous medium. 
     
     
       5. The method of  claim 4 , wherein a water soluble mask is disposed on the wafer during the dicing of the wafer into the plurality of singulated dies, and wherein the water soluble mask is removed during the removing of the water soluble material layer with the aqueous medium. 
     
     
       6. The method of  claim 1 , wherein forming the material layer comprises forming a water soluble material layer. 
     
     
       7. The method of  claim 6 , further comprising:
 baking the water soluble material layer prior to expanding the dicing tape. 
 
     
     
       8. The method of  claim 6 , wherein forming the water soluble material layer comprises forming a material selected from the group consisting of polyvinyl alcohol, polyacrylic acid, dextran, polymethacrylic acid, polyethylene imine, and polyethylene oxide. 
     
     
       9. The method of  claim 6 , wherein the water soluble material layer has an etch rate in an aqueous solution approximately in the range of 1-15 microns per minute. 
     
     
       10. The method of  claim 6 , wherein the forming the water soluble material layer comprises spin-coating the water soluble material layer. 
     
     
       11. The method of  claim 1 , wherein dicing the wafer into the plurality of singulated dies comprises using a laser ablation process. 
     
     
       12. The method of  claim 1 , wherein dicing the wafer into the plurality of singulated dies comprises using a laser scribing plus plasma etching hybrid dicing process. 
     
     
       13. The method of  claim 1 , wherein the dicing tape is housed in a frame. 
     
     
       14. A method of dicing a wafer having a plurality of integrated circuits thereon, the method comprising:
 forming a water soluble mask layer above the wafer, the wafer disposed above a dicing tape, the dicing tape housed in a frame; 
 scribing the water soluble mask layer with a laser scribing process to expose portions of the wafer; 
 etching the exposed portions of the wafer with a plasma process to dice the wafer into a plurality of singulated dies; 
 subsequent to etching the exposed portions of the wafer with the plasma process to dice the wafer into the plurality of singulated dies, forming a water soluble protecting layer over and between the plurality of singulated dies above the dicing tape; 
 removing the dicing tape from the frame; 
 subsequent to removing the dicing tape from the frame, expanding the dicing tape, wherein a plurality of particles is collected on the water soluble material layer during the expanding; and 
 subsequent to expanding the dicing tape, removing the water soluble protecting layer and remaining portions of the water soluble mask layer with an aqueous medium. 
 
     
     
       15. The method of  claim 14 , wherein a source of the plurality of particles is a portion of the wafer surrounding the plurality of integrated circuits thereon. 
     
     
       16. The method of  claim 14 , further comprising:
 baking the water soluble protecting layer at a temperature of approximately 50 degrees Celsius prior to expanding the dicing tape. 
 
     
     
       17. A method of dicing a wafer having a plurality of integrated circuits thereon, the method comprising:
 dicing the wafer into a plurality of singulated dies disposed above a dicing tape; 
 forming a material layer over and between the plurality of singulated dies above the dicing tape, wherein forming the material layer comprises forming a water soluble material layer; and 
 expanding the dicing tape, wherein a plurality of particles is collected on the material layer during the expanding; and 
 baking the water soluble material layer prior to expanding the dicing tape. 
 
     
     
       18. A method of dicing a wafer having a plurality of integrated circuits thereon, the method comprising:
 dicing the wafer into a plurality of singulated dies disposed above a dicing tape; 
 forming a material layer over and between the plurality of singulated dies above the dicing tape, wherein forming the material layer comprises forming a water soluble material layer, and wherein forming the water soluble material layer comprises forming a material selected from the group consisting of polyvinyl alcohol, polyacrylic acid, dextran, polymethacrylic acid, polyethylene imine, and polyethylene oxide; and 
 expanding the dicing tape, wherein a plurality of particles is collected on the material layer during the expanding. 
 
     
     
       19. A method of dicing a wafer having a plurality of integrated circuits thereon, the method comprising:
 dicing the wafer into a plurality of singulated dies disposed above a dicing tape; 
 forming a material layer over and between the plurality of singulated dies above the dicing tape, wherein forming the material layer comprises forming a water soluble material layer, and wherein the water soluble material layer has an etch rate in an aqueous solution approximately in the range of 1-15 microns per minute; and 
 expanding the dicing tape, wherein a plurality of particles is collected on the material layer during the expanding. 
 
     
     
       20. A method of dicing a wafer having a plurality of integrated circuits thereon, the method comprising:
 dicing the wafer into a plurality of singulated dies disposed above a dicing tape; 
 forming a material layer over and between the plurality of singulated dies above the dicing tape, wherein forming the material layer comprises forming a water soluble material layer, and wherein the forming the water soluble material layer comprises spin-coating the water soluble material layer; and 
 expanding the dicing tape, wherein a plurality of particles is collected on the material layer during the expanding. 
 
     
     
       21. A method of dicing a wafer having a plurality of integrated circuits thereon, the method comprising:
 forming a water soluble mask layer above the wafer, the wafer disposed above a dicing tape, the dicing tape housed in a frame; 
 scribing the water soluble mask layer with a laser scribing process to expose portions of the wafer; 
 etching the exposed portions of the wafer with a plasma process to dice the wafer into a plurality of singulated dies; 
 forming a water soluble protecting layer over and between the plurality of singulated dies above the dicing tape; 
 removing the dicing tape from the frame; 
 subsequent to removing the dicing tape from the frame, expanding the dicing tape, wherein a plurality of particles is collected on the water soluble material layer during the expanding; and 
 subsequent to expanding the dicing tape, removing the water soluble protecting layer and remaining portions of the water soluble mask layer with an aqueous medium; and 
 baking the water soluble protecting layer at a temperature of approximately 50 degrees Celsius prior to expanding the dicing tape.

Cited by (0)

No later patents cite this yet.

References (0)

No backward citations on record.