US10879371B2ActiveUtilityA1

Thermal treatment for gate dielectrics

48
Assignee: TAIWAN SEMICONDUCTOR MFG CO LTDPriority: Jun 12, 2018Filed: Jun 12, 2018Granted: Dec 29, 2020
Est. expiryJun 12, 2038(~11.9 yrs left)· nominal 20-yr term from priority
H10D 64/0134H10D 64/01344H10D 64/01332H10D 64/01302H10D 64/013H10D 84/834H10D 84/0158H10D 84/0144H10D 84/038H10D 84/013H10D 30/62H10D 30/024H10D 30/0212H10D 64/685H10D 64/693H10D 64/667H10D 64/017H01L 29/66545H01L 21/823431H01L 21/28185H01L 29/785H01L 29/66795H01L 27/0886H01L 21/823462H01L 21/823418
48
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Cited by
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References
20
Claims

Abstract

Embodiments described in this disclosure relate to formation of a gate structure of a device, such as in a replacement gate process, and the device formed thereby. In some examples, after an interfacial layer and a gate dielectric layer are deposited, a rapid anneal process, such as laser anneal or flash lamp anneal process, is performed in a controlled ambient nitrogen-containing environment to form a nitrided portion in the gate dielectric layer. The nitrided portion passivates the defects at the surface of the gate dielectric layer and can serve as a barrier to prevent etchant chemistry and defects/dopants from the subsequent gate stack layers from affecting or diffusing through the gate dielectric layer. Particularly, the rapid anneal process is performed on a millisecond scale to confine nitrogen atoms in the gate dielectric layer without diffusing into the underlying interfacial dielectric and/or any neighboring structure such as fin.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
       1. A method for semiconductor processing, the method comprising:
 conformally forming a gate dielectric layer over a fin extending from a substrate and along sidewalls of gate spacers over the fin, the gate dielectric layer being amorphous; 
 nitriding the gate dielectric layer in an ammonia-containing ambient environment while using a laser anneal process or a flash lamp anneal process, the nitriding simultaneously crystallizing the gate dielectric layer; and 
 forming one or more metal-containing layers over the gate dielectric layer. 
 
     
     
       2. The method of  claim 1 , wherein nitriding the gate dielectric layer is performed by the laser anneal process operating at a chamber pressure in a range from 650 Torr to 850 Torr and using a laser beam having a dwell time in a range from 0.1 milliseconds to 1 millisecond. 
     
     
       3. The method of  claim 2 , further comprising:
 prior to performing the laser anneal process, preheating a substrate support on which the substrate is disposed to a pre-heat temperature in a range from 200° C. to 600° C. for a duration in a range from 2 seconds to 20 seconds. 
 
     
     
       4. The method of  claim 2 , wherein the laser beam is scanned across an exposed surface of the gate dielectric layer at a scan rate in a range from 15 mm/second to 650 mm/second. 
     
     
       5. The method of  claim 4 , wherein the laser anneal process is performed so that each portion of the gate dielectric layer having the laser beam incident thereon is elevated to a temperature in a range from 850° C. to 1400° C. 
     
     
       6. The method of  claim 1 , wherein nitriding the gate dielectric layer is performed by the flash lamp anneal process operating at a chamber pressure in a range from 10 Torr to 100 Torr and using a radiation-emitting lamp having an irradiation time in a range from 0.2 milliseconds to 5 milliseconds. 
     
     
       7. The method of  claim 6 , wherein the flash lamp anneal process is performed so that an exposed surface of the gate dielectric layer having radiation from the radiation-emitting lamp incident thereon is elevated to a temperature in a range from 850° C. to 1400° C. 
     
     
       8. The method of  claim 6 , wherein the ammonia-containing ambient environment further comprises N 2 , and the N 2  has a volumetric percentage of about 10% to about 100% in the ammonia-containing ambient environment. 
     
     
       9. The method of  claim 6 , further comprising:
 prior to performing the flash lamp anneal process, preheating a substrate support on which the substrate is disposed to a pre-heat temperature of about 450° C. to about 850° C. for about 3 seconds to about 20 seconds. 
 
     
     
       10. A method for semiconductor processing, the method comprising:
 forming an interfacial dielectric along a surface of a fin extending from a substrate; 
 forming a gate dielectric layer over the interfacial dielectric, wherein the gate dielectric layer is formed as an amorphous layer; 
 preheating a substrate support on which the substrate is disposed; 
 after preheating the substrate support, nitriding the gate dielectric layer in an ambient environment containing NH 3  while using a laser beam or a radiation-emitting lamp, wherein nitriding the gate dielectric layer crystallizes the gate dielectric layer; and 
 forming a metal gate electrode over the gate dielectric layer. 
 
     
     
       11. The method of  claim 10 , wherein the ambient environment further comprises N 2 . 
     
     
       12. The method of  claim 10 ,
 wherein preheating the substrate support on which the substrate is disposed is performed to a pre-heat temperature in a range from 450° C. to 850° C. 
 
     
     
       13. The method of  claim 10 , wherein the NH 3  in the ambient environment has a volumetric percentage in a range from 10% to 100% in the ambient environment. 
     
     
       14. The method of  claim 10 , wherein nitriding the gate dielectric layer is performed by irradiating an exposed surface of the gate dielectric layer with radiation from the radiation-emitting lamp so that the exposed surface of the gate dielectric layer having the radiation incident thereon is elevated to a temperature in a range from 850° C. to 1400° C. for a duration in a range from 0.2 milliseconds to 5 milliseconds. 
     
     
       15. A method for semiconductor processing, the method comprising:
 forming an interfacial dielectric along a surface of a fin extending from a substrate; 
 forming a gate dielectric over the interfacial dielectric; 
 wherein the gate dielectric layer is formed as an amorphous layer; 
 preheating a substrate support on which the substrate is disposed; 
 after preheating the substrate support, nitriding the gate dielectric layer in an ambient environment 
 containing NH 3  while using a laser beam or a radiation-emitting lamp; 
 wherein nitriding the gate dielectric layer crystallizes the gate dielectric layer; and 
 forming a metal gate electrode over the gate dielectric layer. 
 
     
     
       16. A method for semiconductor processing, the method comprising:
 forming an interfacial layer over a fin; 
 forming a gate dielectric layer over the interfacial layer, the gate dielectric layer being formed as an amorphous layer; 
 nitriding and crystallizing the gate dielectric layer using a laser anneal process or a flash lamp anneal process while in a nitrogen-containing environment, while the laser anneal process or the flash lamp anneal process is a millisecond timescale or below anneal process; and 
 forming one or more metal-containing layers over the gate dielectric layer. 
 
     
     
       17. The method of  claim 16 , wherein the fin is part of a substrate, and further comprising:
 prior to nitriding the gate dielectric layer, preheating a substrate support on which the substrate is disposed to a pre-heat temperature in a range from 450° C. to 850° C. 
 
     
     
       18. The method of  claim 16 , wherein a ratio of a thickness of the gate dielectric layer to a thickness of a nitridated portion of the gate dielectric layer is in a range from 1:1.1 to 1:2.5. 
     
     
       19. The method of  claim 16 , wherein a dwell time of the laser anneal process is from 0.1 milliseconds to 1 millisecond. 
     
     
       20. The method of  claim 16 , wherein a radiation time of the flash lamp anneal process is in a range from 0.2 milliseconds to 5 milliseconds.

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