Semiconductor device, semiconductor device manufacturing method, and power conversion apparatus

Abstract

An RC-IGBT includes a first electrode disposed on a first main surface of a semiconductor substrate over a transistor region and a diode region. The semiconductor substrate includes a MOS gate structure on a first main surface side in the transistor region. The RC-IGBT includes: an interlayer dielectric covering a gate electrode of the MOS gate structure, and having a contact hole exposing a semiconductor layer; and a barrier metal disposed in the contact hole. The first electrode enters the contact hole, is in contact with the semiconductor layer of the MOS gate structure through the barrier metal, and is in direct contact with a semiconductor layer in the diode region of the semiconductor substrate.

What is claimed is: 
     
       1. A semiconductor device manufacturing method, comprising performing, in this order, the steps of:
 (a) forming a MOS gate structure and a diode structure on a first main surface side of a semiconductor substrate; 
 (b) forming an interlayer dielectric on said MOS gate structure and said diode structure; 
 (c) opening a contact hole in said interlayer dielectric on said MOS gate structure, said contact hole exposing a semiconductor layer of said MOS gate structure; 
 (d) forming a barrier metal on said semiconductor layer in said contact hole and on said interlayer dielectric; 
 (e) removing said interlayer dielectric and said barrier metal on said diode structure; and 
 (f) forming a first electrode in said contact hole and on said diode structure; 
 wherein no barrier metal is disposed on said first main surface side of said semiconductor substrate over said diode structure; and 
 wherein said barrier metal including at least one of titanium nitride, titanium carbide, and titanium silicide. 
 
     
     
       2. The semiconductor device manufacturing method according to  claim 1 , wherein
 said step (e) is a step of removing said interlayer dielectric and said barrier metal on said diode structure by dry etching. 
 
     
     
       3. The semiconductor device manufacturing method according to  claim 1 , wherein
 said step (e) includes the steps of:
 (e1) removing said barrier metal and a part of a thickness of said interlayer dielectric on said diode structure by dry etching; and 
 (e2) removing said interlayer dielectric on said diode structure left in said step (e1) by wet etching.