US11233090B2ActiveUtilityA1

Double selector element for low voltage bipolar memory devices

85
Assignee: INTEL CORPPriority: Sep 27, 2017Filed: Sep 27, 2017Granted: Jan 25, 2022
Est. expirySep 27, 2037(~11.2 yrs left)· nominal 20-yr term from priority
H01L 45/1675H01L 27/2481H01L 45/1233H01L 45/06H01L 27/224H01L 27/2409H10N 70/231H10N 70/20H10B 63/20H10N 50/01H10B 63/80H10N 70/063H10N 70/826H10B 61/10H10B 63/84
85
PatentIndex Score
3
Cited by
11
References
17
Claims

Abstract

Embedded non-volatile memory structures having double selector elements are described. In an example, a memory device includes a word line. A double selector element is above the word line. The double selector element includes a first selector material layer, a second selector material layer different than the first selector material layer, and a conductive layer directly between the first selector material layer and the second selector material layer. A bipolar memory element is above the word line. A conductive electrode is between the double selector element and the bipolar memory element. A bit line is above the word line.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
       1. A memory device, comprising:
 a word line; 
 a double selector element above the word line, the double selector element comprising a first selector material layer, a second selector material layer different than the first selector material layer, and a conductive layer directly between the first selector material layer and the second selector material layer; 
 a bipolar memory element above the word line; a conductive electrode between the double selector element and the bipolar memory element; and 
 a bit line above the word line. 
 
     
     
       2. The memory device of  claim 1 , wherein one or both of the first selector material layer and the second selector material layer comprises a phase change material. 
     
     
       3. The memory device of  claim 1 , wherein one or both of the first selector material layer and the second selector material layer comprises an insulator metal transition material layer. 
     
     
       4. The memory device of  claim 1 , wherein one or both of the first selector material layer and the second selector material layer comprises a semiconducting oxide material. 
     
     
       5. The memory device of  claim 1 , wherein the first selector material layer comprises a phase change material, and the second selector material layer comprises an insulator metal transition material layer. 
     
     
       6. The memory device of  claim 1 , wherein the first selector material layer comprises a phase change material, and the second selector material layer comprises a semiconducting oxide material. 
     
     
       7. The memory device of  claim 1 , wherein the first selector material layer comprises an insulator metal transition material, and the second selector material layer comprises a semiconducting oxide material. 
     
     
       8. The memory device of  claim 1 , wherein the conductive layer comprises a material selected from the group consisting of WN, TiN, TaN, W, Ti, Ta and Ru. 
     
     
       9. The memory device of  claim 1 , wherein the double selector element has a threshold voltage less than or equal to 1V. 
     
     
       10. The memory device of  claim 1 , wherein the double selector element is above the bipolar memory element. 
     
     
       11. The memory device of  claim 1 , wherein the double selector element is below the bipolar memory element. 
     
     
       12. The memory device of  claim 1 , wherein the bipolar memory element comprises a resistive random access memory (RRAM) device. 
     
     
       13. The memory device of  claim 1 , wherein the bipolar memory element comprises a magnetic tunnel junction (MTJ) device. 
     
     
       14. A memory structure, comprising:
 a first bit line above a substrate; 
 a first memory cell on the first bit line, the first memory cell comprising:
 a first double selector element above the word line, the first double selector element comprising a first selector material layer, a second selector material layer different than the first selector material layer, and a conductive layer directly between the first selector material layer and the second selector material layer; 
 a first bipolar memory element above the first bit line; 
 a first conductive electrode between the first double selector element and the first bipolar memory element; 
 a word line on the first memory cell; 
 a second memory cell on the word line, the second memory cell comprising:
 a second double selector element above the word line, the second double selector element comprising a first selector material layer, a second selector material layer different than the first selector material layer, and a conductive layer directly between the first selector material layer and the second selector material layer; 
 a second bipolar memory element above the word line; 
 a second conductive electrode between the second double selector element and the second bipolar memory element; and 
 
 
 a second bit line on the second memory cell. 
 
     
     
       15. The memory structure of  claim 14 , wherein the first double selector element is above the first bipolar memory element, and the second double selector element is below the second bipolar memory element. 
     
     
       16. The memory structure of  claim 14 , wherein the first double selector element is below the first bipolar memory element and the second double selector element is above the second bipolar memory element. 
     
     
       17. The memory structure of  claim 14 , wherein the first bipolar memory and the second bipolar memory element each comprise a resistive random access memory (RRAM) device, or each comprise a magnetic tunnel junction (MTJ) device.

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