Cut EPI process and structures

Abstract

A method includes etching two source/drain regions over a substrate to form two source/drain trenches; epitaxially growing two source/drain features in the two source/drain trenches respectively; performing a cut process to the two source/drain features; and after the cut process, depositing a contact etch stop layer (CESL) over the two source/drain features.

What is claimed is: 
     
       1. A method, comprising:
 etching two source/drain regions over a substrate to form two source/drain trenches; 
 epitaxially growing two source/drain features in the two source/drain trenches respectively; 
 performing a cut process to the two source/drain features, wherein each of the source/drain features has a cut surface formed by the cut process and multiple non-cut surfaces formed by the epitaxially growing; and 
 after the cut process, depositing a contact etch stop layer (CESL) conformally over and contacting the cut and non-cut surfaces. 
 
     
     
       2. The method of  claim 1 , further comprising:
 depositing an inter-level dielectric (ILD) layer over the CESL; 
 etching contact holes through the ILD layer and the CESL to expose the source/drain features; and 
 forming contacts in the contact holes. 
 
     
     
       3. The method of  claim 2 , after the depositing of the ILD layer and before the etching of the contact holes, further comprising:
 replacing a sacrificial gate with a high-k metal gate adjacent to at least one of the source/drain features. 
 
     
     
       4. The method of  claim 1 , wherein the two source/drain trenches are formed atop two semiconductor fins respectively. 
     
     
       5. The method of  claim 1 , wherein the two source/drain features merge before the cut process is performed and are separated by the cut process. 
     
     
       6. The method of  claim 1 , wherein performing the cut process includes applying an anisotropic etching that is selective to a material of the two source/drain features. 
     
     
       7. The method of  claim 1 , wherein the two source/drain features are formed atop two fins that are generally parallel with each from a top view, and performing the cut process includes forming a patterned mask having an opening that is between the two fins and is generally parallel with the two fins from the top view. 
     
     
       8. The method of  claim 1 , wherein the cut process also etches an isolation structure over and directly contacting the substrate, resulting in a dip in the isolation structure and between the two source/drain features. 
     
     
       9. The method of  claim 8 , wherein the CESL is deposited on a surface of the dip. 
     
     
       10. A method, comprising:
 providing a structure having a substrate, an isolation structure over the substrate, two fins extending from the substrate and above the isolation structure, and sacrificial gates over the isolation structure and engaging the fins; 
 etching the two fins in source/drain regions to form two source/drain trenches side by side; 
 epitaxially growing two source/drain features in the two source/drain trenches; 
 performing a cut process to separate the two source/drain features, wherein each of the source/drain features has a first surface and a second surface, the first surface is a near-vertical surface formed by the cut process, and the second surface is a sloped surface formed by the epitaxially growing; 
 after the cut process, depositing a contact etch stop layer (CESL) conformally over and contacting the first and second surfaces; 
 depositing an inter-level dielectric (ILD) layer over the CESL; and 
 replacing the sacrificial gates with high-k metal gates. 
 
     
     
       11. The method of  claim 10 , after the replacing of the sacrificial gates, further comprising:
 etching contact holes that penetrate the ILD layer and the CESL and expose the two source/drain features; and 
 forming contacts in the contact holes. 
 
     
     
       12. The method of  claim 11 , before the forming of the contacts, further comprising:
 forming silicide features over the two source/drain features exposed in the contact holes. 
 
     
     
       13. The method of  claim 10 , wherein the performing of the cut process includes:
 forming an anti-reflective coating (ARC) layer over the structure; 
 forming a photoresist layer over the ARC layer; 
 patterning the photoresist layer to form an opening that is between the two fins and generally parallel with the two fins from a top view; and 
 etching the two source/drain features through the opening. 
 
     
     
       14. The method of  claim 10 , wherein the performing of the cut process includes applying an anisotropic etching process to the two source/drain features. 
     
     
       15. The method of  claim 10 , wherein the performing of the cut process separates the two source/drain features that merge during the epitaxially growing of the two source/drain features. 
     
     
       16. A method, comprising:
 providing a structure having a substrate, an isolation structure over the substrate, two fins extending from the substrate and above the isolation structure, and sacrificial gates over the isolation structure and engaging the fins, wherein the two fins belong to two different inverters; 
 etching the two fins in source/drain regions to form two source/drain trenches side by side; 
 epitaxially growing two source/drain features in the two source/drain trenches, wherein the two source/drain features merge and have sloped surfaces; 
 performing a cut process to separate the two source/drain features, resulting in near-vertical cut surfaces on the two source/drain features; 
 after the cut process, depositing a contact etch stop layer (CESL) over the two source/drain features and contacting the sloped and cut surfaces; 
 depositing an inter-level dielectric (ILD) layer over the CESL; 
 replacing the sacrificial gates with high-k metal gates; 
 etching the ILD layer and the CESL to form contact holes that expose the two source/drain features; and 
 forming contacts in the contact holes. 
 
     
     
       17. The method of  claim 16 , wherein the isolation structure directly contacts the substrate and the cut process also etches the isolation structure, resulting in a dip in the isolation structure and between the two source/drain features. 
     
     
       18. The method of  claim 17 , wherein the CESL is also deposited on a surface of the dip. 
     
     
       19. The method of  claim 16 , wherein performing the cut process includes applying an anisotropic etching that is selective to a material of the two source/drain features. 
     
     
       20. The method of  claim 16 , wherein the two different inverters are cross-coupled to form a storage unit of an SRAM cell.