Gate dielectric having a non-uniform thickness profile

Abstract

A first dielectric layer is formed over upper and side surfaces of a semiconductor fin structure. A mask layer is formed over a first portion of the first dielectric layer disposed over the upper surface of the fin structure. The mask layer and the first dielectric layer have different material compositions. Second portions of the first dielectric layer disposed on side surfaces of the fin structure are etched. The mask layer protects the first portion of the first dielectric layer from being etched. A second dielectric layer is formed over the mask layer and the side surfaces of the fin structure. An oxidation process is performed to convert the mask layer into a dielectric material having substantially a same material composition as the first or second dielectric layer. The dielectric material and remaining portions of the first or second dielectric layer collectively serve as a gate dielectric of a transistor.

What is claimed is: 
     
       1. A method of fabricating semiconductor device, comprising:
 forming a first dielectric layer over an upper surface and side surfaces of a fin structure that contains a semiconductor material; 
 forming a mask layer over a first portion of the first dielectric layer disposed over the upper surface of the fin structure, wherein the mask layer and the first dielectric layer have different material compositions; 
 etching second portions of the first dielectric layer disposed on side surfaces of the fin structure, wherein the mask layer protects the first portion of the first dielectric layer from being etched; 
 after the etching, forming a second dielectric layer over the mask layer and over the side surfaces of the fin structure; and 
 after the second dielectric layer has been formed, performing an oxidation process to convert the mask layer into a dielectric material having substantially a same material composition as the first dielectric layer or the second dielectric layer, wherein the dielectric material and remaining portions of the first dielectric layer and the second dielectric layer collectively serve as a gate dielectric of a transistor. 
 
     
     
       2. The method of  claim 1 , wherein the first dielectric layer and the second dielectric layer are each formed as a silicon oxide layer. 
     
     
       3. The method of  claim 1 , wherein the forming the mask layer includes forming a non-silicon-oxide material as the mask layer. 
     
     
       4. The method of  claim 3 , wherein the forming the non-silicon-oxide material includes forming silicon carbon nitride (SiCN) as the non-silicon-oxide material. 
     
     
       5. The method of  claim 3 , wherein the oxidation process includes an oxygen annealing process to convert the non-silicon-oxide material into a silicon oxide material. 
     
     
       6. The method of  claim 1 , wherein the forming the first dielectric layer and the forming the mask layer are both performed within a Plasma Enhanced Atomic Layer Deposition (PEALD) chamber. 
     
     
       7. The method of  claim 6 , wherein:
 the first dielectric layer is formed using silicon and oxygen precursors; and 
 the mask layer is formed using the silicon precursor but without the oxygen precursor. 
 
     
     
       8. The method of  claim 1 , wherein the gate dielectric is formed such that a top portion thereof is substantially thicker than side portions thereof. 
     
     
       9. The method of  claim 1 , wherein the etching completely exposes the side surfaces of the fin structure. 
     
     
       10. The method of  claim 1 , wherein the fin structure is a fin structure of a non-input/output (non-I/O) device, and wherein the method further comprises:
 forming a dummy gate electrode over the gate dielectric; 
 replacing the gate dielectric with a high-k gate dielectric; and 
 replacing the dummy gate electrode with a metal gate electrode, wherein the metal gate electrode is formed over the high-k gate dielectric. 
 
     
     
       11. The method of  claim 1 , wherein the fin structure is a fin structure of an input/output (I/O) device, and wherein the method further comprises:
 forming a dummy gate electrode over the gate dielectric; and 
 replacing the dummy gate electrode with a metal gate electrode, wherein the metal gate electrode is formed over the gate dielectric. 
 
     
     
       12. The method of  claim 1 , wherein the first dielectric layer is formed over a plurality of fin structures in both an input/output (I/O) region and a non-I/O region, and wherein the method further comprises:
 forming a photoresist mask to cover up the fin structures located in the I/O region but not the fin structures in the non-I/O region; 
 partially etching the gate dielectric in the non-I/O region while the gate dielectric in the I/O region is protected by the photoresist mask; and 
 thereafter removing the photoresist mask. 
 
     
     
       13. A method of fabricating semiconductor device, comprising:
 forming a first dielectric layer over an active region; 
 forming a mask layer over a first portion of the first dielectric layer; 
 etching second portions of the first dielectric layer while the mask layer protects the first portion of the first dielectric layer from being etched; 
 forming a second dielectric layer over the mask layer and over the active region; 
 oxidizing the mask layer into a dielectric material having substantially a same material composition as the first dielectric layer or the second dielectric layer; 
 wherein: 
 the dielectric material and remaining portions of the first dielectric layer and the second dielectric layer after the oxidizing collectively serve as a gate dielectric of a transistor; and 
 the gate dielectric is formed such that a top portion thereof is substantially thicker than side portions thereof. 
 
     
     
       14. The method of  claim 13 , wherein:
 the active region includes an upwardly protruding fin structure; 
 the first dielectric layer is formed over an upper surface and side surfaces of the fin structure; and 
 the second dielectric layer is formed over at least the side surfaces of the fin structure. 
 
     
     
       15. The method of  claim 13 , wherein the oxidizing comprises performing an oxygen annealing process to the mask layer to convert a non-silicon-oxide material of the mask layer into a silicon oxide material. 
     
     
       16. The method of  claim 13 , wherein:
 the first dielectric layer is formed using a silicon precursor and an oxygen precursor; and 
 the mask layer is formed using the silicon precursor but without the oxygen precursor. 
 
     
     
       17. The method of  claim 13 , wherein the etching exposes side surfaces of the active region. 
     
     
       18. A method of fabricating semiconductor device, comprising:
 forming, in a Plasma Enhanced Atomic Layer Deposition (PEALD) chamber using a silicon precursor and an oxygen precursor, a first dielectric layer over an upper surface and side surfaces of an active region; 
 forming, in the PEALD chamber using the silicon precursor but without the oxygen precursor, a mask layer over a first portion of the first dielectric layer; 
 etching second portions of the first dielectric layer while the mask layer protects the first portion of the first dielectric layer from being etched; 
 forming a second dielectric layer over at least the side surfaces of the mask layer and over the active region; and 
 performing an oxidation process, wherein the oxidation process transforms at least portions of the mask layer into a dielectric material having substantially a same material composition as the first dielectric layer or the second dielectric layer. 
 
     
     
       19. The method of  claim 18 , wherein:
 the dielectric material and remaining portions of the first dielectric layer and the second dielectric layer after the oxidation process has been performed collectively serve as a gate dielectric of a transistor; and 
 the gate dielectric is formed such that a top portion thereof is substantially thicker than side portions thereof. 
 
     
     
       20. The method of  claim 19 , wherein the active region includes an upwardly protruding fin structure of an input/output (I/O) device, and wherein the method further comprises:
 forming a dummy gate electrode over the gate dielectric; and 
 replacing the dummy gate electrode with a metal gate electrode, wherein the metal gate electrode is formed over the gate dielectric.