US11810862B2ActiveUtilityA1

Electronic package and manufacturing method thereof

79
Assignee: SILICONWARE PRECISION INDUSTRIES CO LTDPriority: Aug 27, 2020Filed: Nov 1, 2022Granted: Nov 7, 2023
Est. expiryAug 27, 2040(~14.1 yrs left)· nominal 20-yr term from priority
H10W 74/00H10W 90/297H10W 90/22H10W 74/15H10W 90/00H10W 90/724H10W 90/734H10W 70/093H10W 99/00H10W 90/401H10W 70/685H10W 70/611H10W 70/05H10W 70/635H10W 70/614H10W 72/00H10W 90/701H10W 40/22H10P 72/7424H10P 72/743H10W 70/65H10W 74/111H10W 95/00H10P 72/74H01L 23/5381H01L 21/481H01L 21/4857H01L 23/49822H01L 23/49833H01L 23/5385H01L 21/4853
79
PatentIndex Score
0
Cited by
5
References
13
Claims

Abstract

An electronic package is provided, in which a circuit board and a circuit block are embedded in an encapsulating layer at a distance to each other, and circuit structures are formed on the two opposite surfaces of the encapsulating layer with electronic components arranged on one of the circuit structures. The circuit block and the circuit board embedded in the encapsulating layer are spaced apart from each other to allow to separate current conduction paths. As such, the circuit board will not overheat, and issues associated with warpage of the circuit board can be eliminated. Moreover, by embedding the circuit block and the circuit board in the encapsulating layer at a distance to each other, the structural strength of the encapsulating layer can be improved.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
       1. A method for manufacturing an electronic package, comprising:
 providing a circuit board and at least one circuit block at a distance from one another on a carrier board, wherein the circuit board is formed with a plurality of grooves such that the plurality of grooves form a cross-shaped groove structure; 
 forming an encapsulating layer on the carrier board for encapsulating the circuit board and the circuit block, wherein the encapsulating layer has a first surface and a second surface opposite to each other, and the encapsulating layer is bonded onto the carrier board via the second surface; 
 forming a first circuit structure on the first surface of the encapsulating layer, the first circuit structure being electrically connected with the circuit board and the circuit block; 
 disposing an electronic component on the first circuit structure, the electronic component being electrically connected with the first circuit structure; 
 removing the carrier board; and 
 forming a second circuit structure on the second surface of the encapsulating layer, the second circuit structure being electrically connected with the circuit board and the circuit block. 
 
     
     
       2. The method of  claim 1 , wherein a plurality of circuit blocks are embedded in the encapsulating layer at a distance to one another. 
     
     
       3. The method of  claim 1 , wherein the circuit board and the circuit block are spaced apart from each other. 
     
     
       4. The method of  claim 1 , wherein the circuit board is provided with a receiving space for receiving the circuit block, and the encapsulating layer is further formed in the receiving space to encapsulate the circuit block. 
     
     
       5. The method of  claim 1 , wherein the encapsulating layer is formed in the grooves. 
     
     
       6. The method of  claim 1 , wherein a plurality of conductive structures are embedded in the encapsulating layer. 
     
     
       7. The method of  claim 1 , further comprising encapsulating the electronic component with a packaging layer. 
     
     
       8. The method of  claim 1 , further comprising forming a plurality of conductive components on the second circuit structure. 
     
     
       9. The method of  claim 1 , wherein the circuit block has at least an insulating body or at least one semiconductor base and at least one conductive pillar embedded in the insulating body or the semiconductor base. 
     
     
       10. The method of  claim 9 , wherein the insulating body is an encapsulant, and the semiconductor base includes silicon. 
     
     
       11. The method of  claim 9 , further comprising forming a circuit portion electrically connected with the conductive pillar on at least one of the two opposite sides of the insulating body or the semiconductor base. 
     
     
       12. The method of  claim 1 , wherein the circuit board is a coreless circuit structure. 
     
     
       13. The method of  claim 1 , wherein a plurality of electronic components are provided on the first circuit structure, and a gap is formed between at least two of the plurality of electronic components, such that the circuit block is positioned in the gap for electrically bridging the two electronic components.

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