US12211775B2ActiveUtilityA1

Multiple substrate package systems and related methods

66
Assignee: SEMICONDUCTOR COMPONENTS IND LLCPriority: Dec 18, 2020Filed: Dec 18, 2020Granted: Jan 28, 2025
Est. expiryDec 18, 2040(~14.4 yrs left)· nominal 20-yr term from priority
H10W 76/47H10W 99/00H10W 90/401H10W 90/00H10W 74/111H10W 70/611H10W 70/093H10W 70/048H10W 90/734H10W 72/347H10W 72/07354H10W 90/701H10W 90/811H10W 70/481H10W 70/421H10W 70/468H10W 40/778H10W 74/121H10W 72/075H10W 74/127H10W 72/071H10W 40/255H10W 76/17H01L 23/24H01L 25/18H01L 23/5385H01L 23/49833H01L 23/3107H01L 21/4853H01L 21/4842H01L 21/4803H01L 23/49811H10W 72/50
66
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References
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Claims

Abstract

Implementations of a semiconductor package may include a first substrate including a first group of leads physically coupled thereto and a second group of leads physically coupled thereto; a second substrate coupled over the first substrate and physically coupled to the first group of leads and the second group of leads; and one or more semiconductor die coupled between the first substrate and the second substrate. The second group of leads may be electrically isolated from the first substrate.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
       1. A semiconductor package comprising:
 a first substrate comprising a first group of leads physically coupled thereto and a second group of leads physically coupled thereto; 
 a second substrate coupled over the first substrate and physically coupled to the first group of leads and the second group of leads; and 
 one or more semiconductor die coupled between the first substrate and the second substrate; 
 wherein the second group of leads is electrically isolated from the first substrate; 
 wherein the first group of leads is electrically coupled to the one or more semiconductor die through the first substrate; 
 wherein each lead of the first group of leads and each lead of the second group of leads are coupled between the first substrate and the second substrate; and 
 wherein the first group of leads and the second group of leads are configured to couple the semiconductor package to an external device. 
 
     
     
       2. The package of  claim 1 , wherein the second group of leads are each coupled to a corresponding electrically isolated copper island formed in a layer of copper on the first substrate. 
     
     
       3. The package of  claim 1 , further comprising an encapsulant in a space between the first substrate and the second substrate. 
     
     
       4. The package of  claim 1 , wherein the first group of leads and the second group of leads are both coupled on a same side of the first substrate and on a same side of the second substrate. 
     
     
       5. The package of  claim 1 , wherein the first group of leads and the second group of leads are coupled on different sides of the first substrate and the second substrate. 
     
     
       6. The package of  claim 1 , further comprising one or more leads physically and electrically coupled to the first substrate and to the second substrate. 
     
     
       7. The package of  claim 1 , wherein an end of each lead of the first group of leads and an end of each lead of the second group of leads is coined. 
     
     
       8. The package of  claim 1 , further comprising a pre-mold encapsulant formed around the first group of leads and the second group of leads. 
     
     
       9. A semiconductor package comprising:
 a first substrate comprising a first group of leads physically coupled thereto and a second group of leads physically coupled thereto, the second group of leads physically coupled to corresponding electrically isolated islands coupled one of in or on the first substrate; 
 a second substrate coupled over the first substrate and physically coupled to the first group of leads and the second group of leads; and 
 one or more semiconductor die coupled between the first substrate and the second substrate: 
 wherein the first group of leads and the second group of leads are configured to couple the semiconductor package to an external device. 
 
     
     
       10. The package of  claim 9 , wherein the corresponding electrically isolated islands are comprised in the first substrate. 
     
     
       11. The package of  claim 9 , wherein the first group of leads and the second group of leads are both coupled on a same side of the first substrate and on a same side of the second substrate. 
     
     
       12. The package of  claim 9 , wherein the first group of leads and the second group of leads are coupled on different sides of the first substrate and the second substrate. 
     
     
       13. The package of  claim 9 , further comprising one or more leads physically and electrically coupled to the first substrate and to the second substrate. 
     
     
       14. The package of  claim 9 , wherein an end of each lead of the first group of leads and an end of each lead of the second group of leads is coined. 
     
     
       15. The package of  claim 9 , further comprising a pre-mold encapsulant formed around the first group of leads and the second group of leads. 
     
     
       16. A method of forming a semiconductor package, the method comprising:
 physically and electrically coupling a first group of leads to a first substrate; 
 physically coupling a second group of leads to the first substrate using corresponding electrically isolated islands coupled one of in or on the first substrate; 
 physically and electrically coupling a second substrate to the first group of leads and to the second group of leads; and 
 coupling one or more semiconductor die between the first substrate and the second substrate; 
 wherein the first group of leads and the second group of leads are configured to couple the semiconductor package to an external device. 
 
     
     
       17. The method of  claim 16 , further comprising coining the first group of leads and the second group of leads. 
     
     
       18. The method of  claim 16 , further comprising applying a pre-mold encapsulant around the first group of leads and around the second group of leads. 
     
     
       19. A method of  claim 16 , wherein the corresponding electrically isolated islands are comprised in the first substrate. 
     
     
       20. The method of  claim 16 , wherein the first group of leads and the second group of leads are coupled on one of a same side of the first substrate or different sides of the first substrate.

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