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US12374645B2ActiveUtilityPatentIndex 61

Electronic device including dies and an interconnect coupled to the dies and processes of forming the same

Assignee: ADVANCED MICRO DEVICES INCPriority: Mar 25, 2022Filed: Mar 25, 2022Granted: Jul 29, 2025
Est. expiryMar 25, 2042(~15.7 yrs left)· nominal 20-yr term from priority
Inventors:FU LEISWAMINATHAN RAJAWILKERSON BRETT P
H10W 90/723H10W 90/10H10W 90/00H10W 72/853H10W 70/654H10W 70/60H10W 72/252H10W 72/244H10W 70/614H10W 70/09H01L 2924/37001H01L 2924/1434H01L 2924/1433H01L 2924/1431H01L 2924/1427H01L 2924/14252H01L 2224/73209H01L 2224/25175H01L 2224/24137H01L 2224/24101H01L 2224/215H01L 2224/16137H01L 25/0655H01L 24/73H01L 24/25H01L 24/20H01L 24/19H01L 24/16H01L 24/24
61
PatentIndex Score
0
Cited by
20
References
16
Claims

Abstract

An electronic device can include a first die, a second die, and an interconnect. The first die or the second die has a principal function as a power module or a memory. The first die includes a first bond pad, and the second die includes a second bond pad. The device sides of the first and second dies are along the same sides as the first and second bond pads. In an embodiment, the first die and the second die are in a chip first, die face-up configuration. The first and the second bond pads are electrically connected along a first solderless connection that includes the interconnect. In another embodiment, each material within the electrical connection between the first and the second bond pads has a flow point or melting point temperature of at least 300° C.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
       1. An electronic device, comprising:
 a first die including a first bond pad, a first side and a second side opposite the first die, wherein the first bond pad is disposed along the first side of the first die; 
 a second die including a second bond pad, a first side and a second side opposite the second die, wherein the second bond pad is disposed along the first side of the second die; and 
 a first interconnect, 
 wherein:
 the first die and the second die are in a chip first, die face-up configuration with the first sides of the first die and the second die facing up, 
 the first die or the second die is configured to function as a power management controller, and 
 the first bond pad and the second bond pad are electrically connected along a first solderless connection between the first die and the second die, the first solderless connection operated at current densities ranging from about 0.15 mA/microns 2  to about 10 mA/microns 2 . 
 
 
     
     
       2. The electronic device of  claim 1 , wherein the first solderless connection includes one or more materials, each of which has a flow point or a melting point temperature greater than 300° C. 
     
     
       3. The electronic device of  claim 1 , wherein the first solderless connection withstands the current densities ranging between about 0.15 mA/microns 2  to about 10 mA/microns 2  before the first solderless connection fails using an electromigration test where the solderless connection is held at 110° C. for 50,000 hours. 
     
     
       4. The electronic device of  claim 1 , wherein the power management controller is a DC-to-DC step-down switching regulator. 
     
     
       5. The electronic device of  claim 1 , wherein the first die or the second die has the principal function as the memory. 
     
     
       6. The electronic device of  claim 1 , wherein the first die includes a processor, and the second die is the power management controller. 
     
     
       7. The electronic device of  claim 1 , wherein the first interconnect is first component of a redistribution structure. 
     
     
       8. The electronic device of  claim 7 , further comprising a second interconnect, wherein:
 the first die further includes a third bond pad, 
 the second die further includes a fourth bond pad, 
 the third bond pad and the fourth bond pad are electrically connected along a second solderless connection that includes the second interconnect, 
 the second interconnect is a second component of the redistribution structure, and 
 within the redistribution structure, the second interconnect is at a different elevation as compared to the first interconnect. 
 
     
     
       9. The electronic device of  claim 1 , further comprising a polymer material disposed within a gap between the first die and the second die, wherein the first interconnect overlies the polymer material and spans the gap. 
     
     
       10. The electronic device of  claim 1 , further comprising a first conductive stud and a second conductive stud that are components within of the first solderless connection, wherein:
 the first conductive stud contacts the first bond pad, and 
 the second conductive stud contacts the second bond pad. 
 
     
     
       11. The electronic device of  claim 1 , further comprising a conductive pillar coupled to the first die or the second die, wherein the conductive pillar is configured to be an external terminal for the electronic device. 
     
     
       12. The electronic device of  claim 11 , wherein no conductive pillar of the electronic device contacts the first solderless connection. 
     
     
       13. The electronic device of  claim 1 , wherein the first solderless connection defines a conductive path free of bumps such that a gap between the first die and the second die is reduced to bring the first die closer to the second die and the first interconnect spans across a larger surface area of the first die and the second die. 
     
     
       14. An electronic device, comprising:
 a first die including a first bond pad, a first side and a second side opposite the first die, wherein the first bond pad is disposed along the first side of the first die; 
 a second die including a second bond pad, a first side and a second side opposite the second die, wherein the second bond pad is disposed along the first side of the second die; and 
 a first interconnect, 
 wherein:
 the first die is oriented such that the first side of the first die is above the second side of the first die, 
 the second die is oriented such that the first side of the second die is above the second side of the second die, 
 the first die or the second die is configured to function as a power management controller, and 
 the first bond pad and the second bond pad are electrically connected along a first connection being a solderless connection between the first die and the second die, wherein the solderless connection withstands current densities ranging from about 0.15 mA/microns 2  to about 10 mA/microns 2 , wherein each material within the first connection between the first bond pad and the second bond pad has a flow point or melting point of at least 300° C. 
 
 
     
     
       15. The electronic device of  claim 14 , further comprising a first conductive stud and a second conductive stud, wherein:
 the first conductive stud contacts the first bond pad of the first die, 
 the second conductive stud contacts the second bond pad of the second die, and 
 the first conductive stud, the second conductive stud, and the first interconnect lie along an electrical conduction path between the first bond pad and the second bond pad. 
 
     
     
       16. The electronic device of  claim 14 , further comprising a conductive pillar, wherein the conductive pillar is coupled to a third bond pad of the first die or the second die, and the conductive pillar is configured to be an external terminal for the electronic device.

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