Controlled collapse chip connection (c4) integrated circuit package which has two dissimilar underfill materials

Abstract

An integrated circuit package which may include the dispense of a second encapsulant material (or fillet) different from the first underfill material on an integrated circuit package which may include an integrated circuit that is mounted to a substrate. The package may further have a first underfill material and a second underfill material that are attached to the integrated circuit and the substrate. The second encapsulant material may be tailored to inhibit cracking of the epoxy itself that propagates into the substrate during thermo-mechanical loading.

What is claimed is:  
     
         1 . An integrated circuit package, comprising: 
 a substrate;    an integrated circuit mounted to said substrate;    a first underfill material attached to said substrate and said integrated circuit; and, a second underfill material that is attached to said integrated circuit and said substrate.    
     
     
         2 . The package as recited in  claim 1 , wherein said second underfill material seals said first underfill material.  
     
     
         3 . The package a recited in  claim 1 , wherein said first underfill material has an adhesion strength that is greater than an adhesion strength of said second underfill material.  
     
     
         4 . The package as recited in  claim 1 , wherein said first underfill material is an epoxy.  
     
     
         5 . The package as recited in  claim 4 , wherein said second underfill material is an anhydride epoxy.  
     
     
         6 . The package as recited in  claim 1 , further comprising a solder bump that is attached to said integrated circuit and said substrate.  
     
     
         7 . A process for underfilling an integrated circuit that is mounted to a substrate, comprising: 
 dispensing a first underfill material which becomes attached to the integrated circuit and the substrate; and,    dispensing a second underfill material which become attached to the integrated circuit and the substrate.    
     
     
         8 . The process as recited in  claim 7 , wherein the first underfill material flows between the integrated circuit and the substrate.  
     
     
         9 . A process as recited in  claim 8 , wherein the substrate moves within an oven while the first underfill material flows between the integrated circuit and the substrate.  
     
     
         10 . The process as recited in  claim 7 , wherein the second underfill material is dispensed in a pattern which surrounds the first underfill material.  
     
     
         11 . The process as recited in  claim 7 , further comprising the step of heating the substrate before the first underfill material is dispensed.  
     
     
         12 . The process as recited in  claim 11 , further comprising the step of heating the first underfill material to a partial gel state.  
     
     
         13 . The process as recited in  claim 12 , wherein the substrate is heated to a temperature that is greater than a temperature of said partially gelled first underfill material.  
     
     
         14 . The process as recited in  claim 7 , further comprising the step of mounting the integrated circuit to the substrate with a solder bump before the first underfill material is dispensed.  
     
     
         15 . A process for mounting and underfilling an integrated circuit to a substrate, comprising: 
 baking the substrate;    mounting an integrated circuit to the substrate;    dispensing a first underfill material onto the substrate, wherein the first underfill material flows between the integrated circuit and the substrate while the substrate moves through an oven; and,    dispensing a second underfill material around the first underfill material.    
     
     
         16 . The process as recited in  claim 15 , further comprising the step of mounting the integrated circuit to the substrate with a solder bump before the first underfill material is dispensed.