Fabrication process of semiconductor package and semiconductor package

Abstract

A semiconductor package substrate is provided, which can meet the move toward high integration of semiconductors. A nickel layer is plated on an electroplated copper foil to form a wiring pattern. An LSI chip is mounted on the copper foil, and terminals of the LSI chip and the wiring pattern are connected by wire bonding, followed by sealing with a semiconductor-sealing epoxy resin. Only the copper foil is dissolved away with an alkali etchant to expose nickel. With a nickel stripper having low copper-dissolving power, the nickel layer is removed to expose the wiring pattern. A solder resist is coated, and a pattern is formed in such a way that connecting terminal portions are exposed. Solder balls are placed at the exposed portions of the wiring pattern and are then fused. The wiring pattern is connected to an external printed board via the solder balls.

1 . A process for the fabrication of a semiconductor package, which comprises the following steps: 
 1A) forming wiring on one side of a conductive temporary supporting member;    1B) mounting a semiconductor device on said conductive temporary supporting member on which said wiring has been formed, and then electrically connecting a terminal of said semiconductor device with said wiring;    1C) sealing said semiconductor device with resin;    1D) removing said conductive temporary supporting member to expose said wiring;    1E) forming an insulating layer over said exposed wiring pattern at an area other than position where an external connection terminal is to be formed; and    1F) forming said external connection terminals on said wiring pattern at said positions where said insulating layer has not been formed.    
     
     
         2 . A process for the fabrication of a semiconductor package, which comprises the following steps: 
 2A) forming wiring on one side of a conductive temporary supporting member;    2B) forming an insulating supporting member over said one side of said conductive temporary supporting member, said one side carrying said wiring formed thereon;    2C) removing said conductive temporary supporting member to transfer said wiring pattern onto said insulating supporting member;    2D) removing said insulating supporting member at positions where an external connection terminal is to be formed for said wiring pattern, whereby a through-holes is formed for said external connection terminal;    2E) mounting a semiconductor device on said insulating supporting member on which said wiring has been transferred, and then electrically connecting a terminal of said semiconductor device with said wiring;    2F) sealing said semiconductor device with resin; and    2G) forming, in said through-hole for said external connecting terminal, said external connection terminal so that said external connection terminal is electrically connected to said wiring.    
     
     
         3 . A process for the fabrication of a semiconductor package, which comprises the following steps: 
 3A) forming wiring on one side of a conductive temporary supporting member;    3B) mounting a semiconductor device on said conductive temporary supporting member on which said wiring has been formed, and then electrically connecting a terminal of said semiconductor device with said wiring;    3C) sealing said semiconductor device with resin;    3D) removing said conductive temporary supporting member at an area other than position where an external connection terminal for said wiring is to be formed, whereby said external connection terminal made from said conductive temporary supporting member are formed; and    3E) forming an insulating layer at said area other than said position of said external connection terminal.    
     
     
         4 . A process for the fabrication of a semiconductor package, which comprises the following steps: 
 4A) forming an wiring on one side of a conductive temporary supporting member;    4B) mounting a semiconductor device on said conductive temporary supporting member on which said wiring has been formed, and then electrically connecting a terminal of said semiconductor device with said wiring;    4C) sealing said semiconductor device with resin;    4D) forming a metal pattern, which is different in conditions for removal from said conductive temporary supporting member, on another side of said conductive temporary supporting member, said another side being opposite to said one side where said semiconductor device has been mounted, at a position where an external connection terminal for said wiring patterns is to be formed; and    4E) removing said conductive temporary supporting member at an area other than said position where said metal pattern has been formed.    
     
     
         5 . A process for the fabrication of semiconductor packages, which comprises the following steps: 
 5A) forming plural sets of wiring on one side of an insulating supporting member;    5B) removing said insulating supporting member at positions where external connection terminals for said wiring are to be formed, whereby through-holes for said external connection terminals are provided;    5C) mounting semiconductor devices on said insulating supporting member on which said plural sets of wiring have been formed, and then electrically connecting terminals of said semiconductor devices with said wiring, respectively;    5D) sealing said semiconductor devices with resin;    5E) forming, in said through-holes for said external connection terminals, said external connection terminals so that said external connection terminals are electrically connected to said wiring; and    5F) separating the resultant assembly into individual semiconductor packages.    
     
     
         6 . A process for the fabrication of semiconductor packages, which comprises the following steps: 
 6A) forming plural sets of wiring on one side of a conductive temporary supporting member;    6B) cutting apart said conductive temporary substrate so that said plural sets of wiring formed on said conductive temporary supporting member are divided to include a predetermined number of wiring per unit, and then fixing on a frame said separated conductive temporary supporting member with said wiring formed thereon;    6C) mounting semiconductor devices on said conductive temporary substrates on which said wiring have been formed, and then electrically connecting terminals of said semiconductor devices with said wiring, respectively;    6D) sealing said semiconductor devices with resin;    6E) removing said conductive temporary substrate to expose said wiring;    6F) forming an insulating layer over said exposed wiring patterns at areas other than positions where external connection terminals are to be formed;    6G) forming said external connection terminals at said positions where said insulating layer for the wiring has not been formed; and    6H) separating the resultant assembly into individual semiconductor packages.    
     
     
         7 . A process for the fabrication of semiconductor packages, which comprises the following steps: 
 7A) forming plural sets of wiring on one side of an insulating supporting member;    7B) removing said insulating supporting member at positions where external connection terminals for said wiring are to be formed, whereby through-holes for said external connection terminals are provided;    7C) cutting apart said insulating supporting member so that said plural sets of wiring formed on said insulating supporting member are divided to include a predetermined number of wiring per unit, and then fixing on a frame said separated insulating supporting member with said wiring formed thereon;    7D) mounting semiconductor devices on said insulating supporting members on which said wiring have been formed, and then electrically connecting terminals of said semiconductor devices with said wiring, respectively;    7E) sealing said semiconductor devices with resin;    7F) forming, in said through-holes for said external connection terminals, said external connection terminals so that said external connection terminals are electrically connected to said wiring; and    7G) separating the resultant assembly into individual semiconductor packages.    
     
     
         8 . A process for the fabrication of a semiconductor package provided with a single layer of wiring, one side of said wiring having a first connecting function of being connected with a semiconductor device and an opposite side of said wiring having a second connecting function of being to be connected to external wiring, which comprises the following steps 8A, 8B, 8C and 8D: 
 8A) working a heat-resistant insulating base material having a metal foil, thereby forming said metal foil into plural sets of wiring patterns;    8B) forming a hole at a position, for exhibiting said second connecting function which is to be formed in a subsequent step, so that said hole extends from a side-of said insulating base material to said wiring patterns;    8C) bonding a frame base material, which makes an opening through a predetermined portion thereof, to desired position on a surface of said wiring patterns and a surface of said insulating base material, the latter surface being located adjacent to said wiring patterns, respectively; and    8D) mounting said semiconductor device, electrically connecting a terminal of said semiconductor device with said wiring pattern, and then sealing said semiconductor device with resin.    
     
     
         9 . A process for the fabrication of semiconductor packages provided with a single layer of wiring, one side of said wiring having a first connecting function of being connected with a semiconductor device and an opposite side of said wiring having a second connecting function of being connected to external wiring, which comprises the following steps 9A, 9B, 9C and 9D: 
 9A) working a heat-resistant insulating base material having a metal foil, thereby forming said metal foil into plural sets of wiring patterns;    9B) forming a hole at a position for exhibiting said second connecting function which is to be formed in a subsequent step, so that said hole extend from a side of said insulating base material to said wiring patterns;    9C) bonding a second insulating base material, which makes an opening through a predetermined portion thereof, to a desired position on a surface of said wiring patterns and a surface of said insulating base material, the latter surface being located adjacent to said wiring patterns, respectively, whereby an insulating supporting member is formed;    9D) cutting apart said insulating supporting member so that said plural sets of wiring formed on said insulating supporting member are divided to include a predetermined number of wiring per unit, and then fixing on a frame said separated insulating supporting member with said wiring formed thereon; and    9E) mounting said semiconductor device, connecting a terminal of said semiconductor device with said wiring, and then sealing said semiconductor device with resin.    
     
     
         10 . A process for the fabrication of semiconductor packages, which comprises the following steps: 
 10A) forming plural sets of wiring on one side of a supporting member;    10B) mounting plural semiconductor devices on said supporting member on which said wiring have been formed, and then electrically connecting terminals of said semiconductor devices with said wiring;    10C) subjecting said plural sets of electrically-connected semiconductor device and wiring to gang sealing with resin;    10D) removing desired portions of said supporting member to-expose predetermined portions of said wiring, and forming external connection terminals so that said external connection terminals are electrically connected to said exposed wiring; and    10E) separating the resultant assembly into individual semiconductor packages.    
     
     
         11 . The fabrication process of semiconductor packages according to any one of  claims 1  to  10 , wherein subsequent to the sealing of said semiconductor device or devices with said resin, a hardened product of said sealing resin is subjected to heat treatment.  
     
     
         12 . A semiconductor package fabricated by the process according to any one of  claims 1  to  11 .  
     
     
         13 . A process for the fabrication of a semiconductor device packaging frame, said frame being provided with plural semiconductor-device-mounting portions, portions connecting together said plural semiconductor-device-mounting portions, and a registration mark portion, which comprises the following steps: 
 (a) forming wiring for said semiconductor-device-mounting portions on a conductive temporary substrate,    (b) transferring said wiring onto a resin substrate, and    (c) etching off said conductive temporary substrate;    wherein upon etching off said conductive temporary substrate in step (c), said conductive temporary substrate partly remains to form some of said connecting portions.