US2005098875A1PendingUtilityA1
Semiconductor package board using a metal base
Est. expiryJun 30, 2020(expired)· nominal 20-yr term from priority
H10W 74/15H10W 70/09H10W 72/07236H10P 72/74H10W 90/701H10W 90/401H10W 70/635H10W 70/614H10W 70/05H05K 3/4644H05K 3/20H05K 2201/0969H05K 3/4682H05K 3/06H05K 2203/0323H05K 3/0097H05K 3/4007H05K 3/205H05K 2201/0367H05K 2203/061H05K 2203/0376H05K 2203/1536H05K 3/44
43
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Claims
Abstract
A semiconductor package board for mounting thereon a semiconductor chip includes a metal base having an opening for receiving therein the semiconductor chip and a multilayer wiring film layered onto the metal base. The semiconductor chip is flip-chip bonded onto the metal pads disposed on the multilayer wiring film within the opening. The surface of the metal base is flush with the top surface of the semiconductor chip received in the opening. The resultant semiconductor device has a larger number of external pins and a smaller deformation without using a stiffener.
Claims
exact text as granted — not AI-modified1 - 17 . (canceled).
18 . A method for manufacturing a semiconductor package board, comprising the steps of:
forming a plurality of first metal pads on a first surface of a metal base plate; forming a multilayer wiring film including a plurality of insulating layers and a plurality of wiring layers on said first surface of said metal base plate, said multilayer wiring film having a plurality of second metal pads on a top surface thereof, each of said plurality of second metal pads being electrically connected to respective said first metal pads through said wiring layers; and forming an opening in said metal base plate suited for receiving therein a semiconductor chip, said opening exposing said first metal pads.
19 . A semiconductor package board comprising:
a metal base plate having an opening suited for receiving therein a semiconductor chip; and a multilayer wiring film formed on said metal base plate, said multilayer wiring film having a first surface in contact with said metal base plate and mounting thereon a plurality of first metal pads within a region exposed from said opening of said metal base plate; further comprising the step of forming a metallic film on said first surface of said metal base plate in a region other than regions where said first metal pads are disposed, said metallic film extending along a periphery of said opening after said opening forming step.
20 . The method as defined in claim 19 , wherein said first metal pads forming step and said metallic film forming step are concurrently conducted.
21 . The method according to claim 18 , further comprising the step of forming a recess on a second surface of said metal base plate in a region where said opening is to be formed, prior to said first metal pads forming step.
22 . The method according to claim 18 , further comprising the steps of forming a plurality of another first metal pads on a second surface of said metal base plate, forming another multilayer wiring film on said second surface, and separating said metal base plate into to a first piece having said first surface and a second piece having said second surface.
23 . The method according to claim 22 , further comprising the step of bonding a pair of metal plates together to form said metal base plate.
24 . The method according to claim 18 , wherein said first metal pads forming step includes the steps of forming a first resist mask having a plurality of openings, plating said metal base plate by using said first resist mask as a plating mask to form said first metal pads in said openings, and removing said first resist.
25 . The method according to claim 24 , wherein said first metal pads forming step includes the step of etching said metal base plate by using said first resist to form a plurality of recesses for receiving therein said first metal pads prior to said plating step.
26 . The method according to claim 19 , wherein said metallic film forming step includes the step of plating said metal base plate by using a resist mask.
27 . The method according to claim 24 , wherein said first metal pads forming step includes the step of forming a plurality of solder balls in said openings prior to said plating step.
28 . The method according to claim 18 , further comprising the step of forming a thin-film capacitor on one of said first metal pads prior to said multilayer wiring film forming step.
29 . The method according to claim 18 , wherein said multilayer wiring film forming step includes the steps of forming a insulating layer, forming a plurality of via holes in said insulating layer corresponding to said first metal pads, forming alternately a plurality of wiring layers and a plurality of insulating layers, each of said wiring layers including a plurality of interconnections disposed corresponding to said via holes and insulator resin filled between said interconnections, and forming said second metal pads on an outermost surface of said multilayer wiring film.
30 . The method according to claim 18 , wherein said opening forming step includes the steps of forming a resist exposing a portion of a second surface of said metal base plate, etching said portion of metal base plate by using said resist as a mask to form said opening, and removing said resist.
31 . The method according to claim 18 , further comprising the step of forming a plurality of solder balls or connection pins on respective said second metal pads.
32 . The method according to claim 18 , wherein said metal base plate comprises at least one metal selected from the group consisting of stainless steel, iron, nickel, copper, and aluminum, or an alloy thereof.
33 . The method according to claim 18 , further comprising the step of bonding a carrier base onto a surface of said multilayer wiring film on a side opposite to a surface in contact with said metal base plate.
34 . The method according to claim 33 , wherein said carrier base is one of a printed circuit board, ceramic board, and organic/inorganic composite board, having at least one wiring layer.
35 . The method according to claim 33 , wherein said carrier base is bonded to said multilayer wiring film by using any one of an adhesive, thermo-compression, and a chemical reaction.
36 . The method according to claim 33 , wherein said carrier base is electrically connected to said second metal pads either using conductive paste or an anisotropic conductive film.
37 . The method according to claim 33 , further comprising the step of forming a plurality of either solder balls or connector pins on a surface of said carrier base so as to be electrically connected to said second metal pads through said carrier base.
38 . The method according to claim 33 , wherein said carrier base bonding step is carried out prior to said opening forming step.
39 . The method according to claim 33 , wherein said carrier base bonding step is carried out after said opening forming step.
40 . The method according to claim 33 , further comprising the step of connecting a semiconductor chip to said first metal pads.
41 . The method according to claim 40 , wherein said semiconductor chip is flip-chip bonded to said first metal pads by a material made of either a metal having a low melting point or a conductive resin.Join the waitlist — get patent alerts
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