Memory using mixed valence conductive oxides

Abstract

A memory using a mixed valence conductive oxides. The memory includes a mixed valence conductive oxide that is less conductive in its oxygen deficient state and a mixed electronic ionic conductor that is an electrolyte to oxygen and promotes an electric field effective to cause oxygen ionic motion.

1 . A memory element comprising: 
 a mixed valence conductive oxide that is less conductive in its oxygen deficient state; and    an electrolytic tunnel barrier that is an electrolyte to oxygen and promotes an electric field effective to cause oxygen ionic motion.    
     
     
         2 . The memory element of  claim 1 , wherein the mixed valence conductive oxide has a substantially crystalline structure.  
     
     
         3 . The memory element of  claim 2 , wherein the mixed valence conductive oxide is placed in its oxygen deficient state during normal operation and retains its substantially crystalline structure during normal operation.  
     
     
         4 . The memory element of  claim 1 , wherein less than the entire mixed valence conductive oxide is placed in the oxygen deficient state during normal operation.  
     
     
         5 . The memory element of  claim 1 , wherein strata of the mixed valence conductive oxide closer to the electrolytic tunnel barrier is placed in a more oxygen deficient state during normal operation than strata further away from the electrolytic tunnel barrier.  
     
     
         6 . The memory element of  claim 1 , wherein strata of the mixed valence conductive oxide closer to the electrolytic tunnel barrier exhibits a larger change in valence state during normal operation than strata further away from the electrolytic tunnel barrier.  
     
     
         7 . The memory element of  claim 1 , wherein a conductivity of the memory element is indicative of a memory state and the memory state can be determined non-destructively.  
     
     
         8 . The memory element of  claim 1 , wherein the electric field causes oxygen from the mixed valence conductive oxide to move into the electrolytic tunnel barrier during normal operation.  
     
     
         9 . The memory element of  claim 8 , wherein the electric field causes oxygen from the mixed valence conductive oxide to move all the way through the electrolytic tunnel barrier during normal operation.  
     
     
         10 . The memory element of  claim 1 , wherein the memory element is part of a memory cell having a feature size of not more than about 4 f 2 , f being the minimum fabrication line width.  
     
     
         11 . The memory element of  claim 10 , wherein the memory cell has an effective feature size of not more than about 1 f 2 , whereby an effective feature size may include memory cells stacked upon each other vertically.  
     
     
         12 . The memory element of  claim 11 , wherein the memory cell has an effective feature size of not more than about than about 0.5 f 2 , whereby an effective feature size may include the number of bits that can be stored In each memory cell.  
     
     
         13 . A memory element, comprising: 
 a tunneling barrier having a tunnel barrier width; and    a conductive material having a low conductivity region that forms an effective tunnel barrier width greater than the tunnel barrier width, the low conductivity region being responsive to a voltage across the memory element.    
     
     
         14 . The memory element of  claim 13 , wherein a conductivity of the memory element is indicative of a memory state and the memory state can be determined non-destructively.  
     
     
         15 . The memory element of  claim 13 , wherein an electric field causes anion motion from the conductive material into the tunneling barrier during normal operation.  
     
     
         16 . The memory element of  claim 15 , wherein the electric field causes anion motion from the conductive material through the tunneling barrier during normal operation.  
     
     
         17 . The memory element of  claim 13 , wherein the conductive material has a substantially crystalline structure.  
     
     
         18 . The memory element of  claim 17 , wherein the conductive material retains its substantially crystalline structure during normal operation.  
     
     
         19 . The memory element of  claim 13 , wherein forming does not significantly contribute to an overall conductivity of the memory element during normal operation, whereby forming is localized filamentary movement of an anode material.  
     
     
         20 . The memory element of  claim 13 , wherein the memory element is part of a memory cell having a feature size of not more than about 4 f 2 , being the minimum fabrication line width.  
     
     
         21 . The memory element of  claim 20 , wherein the memory cell has an effective feature size of not more than about 1 f 2 , whereby an effective feature size may include memory cells stacked upon each other vertically.  
     
     
         22 . The memory element of  claim 21 , wherein the memory cell has an effective feature size of not more than about than about 0.5 f 2 , whereby an effective feature size may include the number of bits that can be stored in each memory cell.  
     
     
         23 . A two terminal electrical device, comprising: 
 a tunneling barrier having a tunnel barrier width of less than approximately 50 angstroms; and    a conductive material in series with the tunneling barrier,    wherein the tunneling barrier In series with the conductive material has a first conductivity at a read voltage and a second conductivity at the read voltage after applying a programming voltage.    
     
     
         24 . The two terminal electrical device of  claim 23 , wherein the conductivity of the electrical device is indicative of a memory state and the memory state can be determined non-destructively.  
     
     
         25 . The two terminal electrical device of  claim 23 , wherein the electric field causes anion motion from the conductive material into the tunneling barrier during normal operation.  
     
     
         26 . The two terminal electrical device of  claim 25 , wherein the electric field causes anion motion from the conductive material through the tunneling barrier during normal operation.  
     
     
         27 . The two terminal electrical device of  claim 23 , wherein the conductive material has a substantially crystalline structure.  
     
     
         28 . The two terminal electrical device of  claim 27 , wherein the conductive material retains its substantially crystalline structure during normal operation.  
     
     
         29 . The two terminal electrical device of  claim 23 , wherein forming does not significantly contribute to an overall conductivity of the electrical device during normal operation, whereby forming is localized filamentary movement of an anode material.  
     
     
         30 . The two terminal electrical device of  claim 23 , wherein the two terminal electrical device is part of a memory cell having a feature size of not more than about 4 f 2 , f being the minimum fabrication line width.  
     
     
         31 . The two terminal electrical device of  claim 30 , wherein the memory cell has an effective feature size of not more than about 1 f 2 , whereby an effective feature size may include memory cells stacked upon each other vertically.  
     
     
         32 . The two terminal electrical device of  claim 31 , wherein the memory cell has an effective feature size of not more than about than about 0.5 f 2 , whereby an effective feature size may include the number of bits that can be stored in each memory cell.  
     
     
         33 . A two terminal electrical device, comprising: 
 an insulating material of less than approximately 50 angstroms, having a conduction mechanism including tunneling during both reading and writing; and    a conductive material coupled directly or indirectly with the insulating material,    wherein the two terminal electrical device has a first conductivity at a read voltage and a second conductivity at the read voltage after applying a programming voltage.    
     
     
         34 . The two terminal electrical device of  claim 33 , wherein the conductivity of the two terminal electrical device is indicative of a memory state and the memory state can be determined non-destructively.  
     
     
         35 . The two terminal electrical device of  claim 33 , wherein an electric field causes anion motion from the conductive material into the Insulating material during normal operation.  
     
     
         36 . The two terminal electrical device of  claim 35 , wherein the electric field causes anion motion from the conductive material through the insulating material during normal operation.  
     
     
         37 . The two terminal electrical device of  claim 33 , wherein the conductive material has a substantially crystalline structure.  
     
     
         38 . The two terminal electrical device of  claim 37 , wherein the conductive material retains its substantially crystalline structure during normal operation.  
     
     
         39 . The two terminal electrical device of  claim 33 , wherein forming does not significantly contribute to an overall conductivity of the two terminal electrical device during normal operation, whereby forming is localized filamentary movement of an anode material.  
     
     
         40 . The two terminal electrical device of  claim 33 , wherein the two terminal electrical device is part of a memory cell having a feature size of not more than about 4 f 2 , f being the minimum fabrication line width.  
     
     
         41 . The two terminal electrical device of  claim 40 , wherein the memory cell has an effective feature size of not more than about 1 f 2 , whereby an effective feature size may include memory cells stacked upon each other vertically.  
     
     
         42 . The two terminal electrical device of  claim 41 , wherein the memory cell has an effective feature size of not more than about than about 0.5 f 2 , whereby an effective feature size may include the number of bits that can be stored in each memory cell.