US2006278341A1PendingUtilityA1
Process chamber used in manufacture of semiconductor device, capable of reducing contamination by particulates
Assignee: SAMSUNG ELECTRONICS CO LTDPriority: Sep 23, 1998Filed: Aug 21, 2006Published: Dec 14, 2006
Est. expirySep 23, 2018(expired)· nominal 20-yr term from priority
Inventors:Jeong-Hyuck ParkHee-Duk KimJung-Hun ChoJong-Wook ChoiSung-Bum ChoYoung-Koo LeeJin-Sung KimJang-Eun LeeJu-Hyuck ChungSun-Hoo ParkJae Hyun LeeShin-Woo Nam
H10P 50/267H10P 72/7611H10P 72/72H10P 50/00C23C 16/4583C23C 16/54H01J 37/32623H01J 37/32642H01J 37/32431C23C 16/4585Y10T117/10
52
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Claims
Abstract
A process chamber used in the manufacture of a semiconductor device for etching a material layer on a semiconductor wafer includes an electrostatic chuck for holding the semiconductor wafer, and an annular edge ring which surrounds the side of the semiconductor wafer on the electrostatic chuck to prevent the semiconductor wafer from departing from its original position. The annular edge ring has a first side which faces the side of the semiconductor wafer and contacts firmly with the side of the semiconductor wafer.
Claims
exact text as granted — not AI-modified1 - 10 . (canceled)
11 . A process chamber used in the manufacture of a semiconductor device for etching a material on a semiconductor wafer using plasma, the process chamber comprising:
an electrostatic chuck for holding the semiconductor wafer; and an annular focus ring, which surrounds a side of the semiconductor wafer on the electrostatic chuck to prevent the semiconductor wafer from departing from its original position and to make the plasma distribution uniform by drawing the plasma, having a first side which faces the side of the semiconductor wafer and contacts the side of the semiconductor wafers wherein the focus ring is fixed such that the focus ring cannot rotate.
12 . The process chamber of claim 11 , wherein the focus ring has a first upper surface portion which overlaps the periphery of a bottom surface of the semiconductor wafer and contacts the bottom surface of the semiconductor wafer.
13 . The process chamber of claim 12 , wherein the focus ring has a second upper surface portion which is higher than an upper surface of the semiconductor wafer.
14 . The process chamber of claim 11 , wherein the focus ring has a second side facing a side of the electrostatic chuck, the second side of the edge ring having a shape such that the contact area between the second side and the side of the electrostatic chuck is minimal.
15 . The process chamber of claim 14 , wherein the second side of the focus ring is slanted such that only the edge of the second side contacts the side of the electrostatic chuck.
16 . (canceled)
17 . The process chamber of claim 11 , wherein the focus ring is fixed by at least two fixing pins fixed at points separated from each other by a maximum distance.
18 . The process chamber of claim 11 , wherein the focus ring contains a flat second upper surface portion.
19 . The process chamber of claim 11 , wherein the edge ring comprises quartz, silicon or aluminum nitride.
20 . The process chamber of claim 11 , wherein a surface temperature of the focus ring is maintained to be above at least 50° C. across the entire surface of the focus ring during etching.
21 . The process chamber of claim 11 , wherein a surface temperature of the focus ring is maintained to be above or about 60° C. across the entire surface of the focus ring during etching.
22 . The process chamber of claim 20 , wherein a second upper surface portion of the focus ring is flat without protrusions, and wherein the thickness of the focus ring is sufficient to maintain about the same temperature throughout the focus ring.
23 . The process chamber of claim 22 , wherein a thickness of the focus ring from the flat upper surface to the base thereof is equal to or less than 20 mm.
24 - 42 . (canceled)Cited by (0)
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