Printed circuit board including embedded capacitor having high dielectric constant and method of fabricating same

Abstract

Disclosed is a PCB including embedded capacitors and a method of fabricating the same. A dielectric layer is formed using a ceramic material having a high capacitance, thereby assuring that the capacitors each have a high dielectric constant corresponding to the capacitance of a decoupling chip capacitor.

1 . A printed circuit board including an embedded capacitor having a high dielectric constant, comprising: 
 a first insulating layer made of an insulating material to electrically insulate upper and lower parts from each other;    a circuit layer made of a first conductive material, which is laminated on one side of the first insulating layer and in which circuit patterns including a plurality of lower electrodes of the embedded capacitors are formed;    a plurality of second insulating layers laminated on the lower electrodes of the circuit layer, and made of a ceramic material;    a plurality of upper electrodes laminated on the second insulating layers, and made of a second conductive material; and    a third insulating layer laminated on the circuit layer and upper electrodes, and including through holes for electrically connecting the upper electrodes to external elements.    
   
   
       2 . The printed circuit board as set forth in  claim 1 , further comprising: 
 a first adhesive metal layer made of a first adhesive metal to improve interfacial adhesion between the circuit layer and second insulating layers; and    a second adhesive metal layer made of a second adhesive metal to improve interfacial adhesion between the second insulating layers and upper electrodes.    
   
   
       3 . The printed circuit board as set forth in  claim 1  or  2 , wherein each of the second insulating layers includes at least one selected from the group consisting of SrTiO 3 , BaTiO 3 , (Ba, Sr)TiO 3 , Pb(Zr, Ti)O 3 , (Pb, La)(Zr, Ti)O 3 , Pb(Ti 1/3 Nb 2/3 )O 3 , Ta 2 O 5 , and Al 2 O 3 .  
   
   
       4 . A printed circuit board including an embedded capacitor having a high dielectric constant, comprising: 
 a first insulating layer made of a first insulating material to electrically insulate upper and lower parts from each other;    a first circuit layer made of a first conductive material, which is laminated on one side of the first insulating layer, and in which first circuit patterns including a plurality of lower electrodes of the embedded capacitors are formed and a second insulating material is packed between the first circuit patterns;    a second insulating layer laminated on the first circuit layer, and made of a ceramic material;    a second circuit layer made of a second conductive material, which is laminated on the second insulating layer, and in which second circuit patterns, including a plurality of upper electrodes corresponding to the lower electrodes, are formed; and    a third insulating layer laminated on the second circuit layer, and including through holes for electrically connecting the upper electrodes to external elements.    
   
   
       5 . The printed circuit board as set forth in  claim 4 , further comprising: 
 a first adhesive metal layer made of a first adhesive metal between the lower electrodes of the first circuit layer and second insulating layer, and provided to improve interfacial adhesion therebetween; and    a second adhesive metal layer made of a second adhesive metal between the second insulating layer and upper electrodes of the second circuit layer, and provided to improve interfacial adhesion therebetween.    
   
   
       6 . The printed circuit board as set forth in  claim 4  or  5 , wherein the second insulating layer includes at least one selected from the group consisting of SrTiO 3 , BaTiO 3 , (Ba, Sr)TiO 3 , Pb(Zr, Ti)O 3 , (Pb, La)(Zr, Ti)O 3 , Pb(Ti 1/3 Nb 2/3 )O 3 , Ta 2 O 5 , and Al 2 O 3 .  
   
   
       7 . A method of fabricating a printed circuit board including an embedded capacitor having a high dielectric constant, comprising: 
 a first step of forming circuit patterns including a plurality of lower electrodes of the embedded capacitors on a copper foil on one side of a copper clad laminate;    a second step of laminating a mask, in which portions corresponding to the lower electrodes are opened, on the copper clad laminate to form insulating layers of the embedded capacitors, and spraying a ceramic dielectric through a thermal spray process to form ceramic films;    a third step of forming upper electrodes on the ceramic films formed in the second step and subsequently removing the mask; and    a fourth step of laminating the insulating layers on the copper clad laminate on which the embedded capacitors are formed, and forming through holes for electrically connecting the upper electrodes to external elements.    
   
   
       8 . The method as set forth in  claim 7 , further comprising a fifth step of conducting a pretreatment to improve interfacial adhesion after the first step.  
   
   
       9 . The method as set forth in  claim 7 , wherein the spraying of the ceramic dielectric through the thermal spray process in the second step is conducted under conditions such that a distance between a thermal spray gun and a mother material is 3-4 inches, a moving speed of the thermal spray gun or mother material is 1-2 m/sec, an air filter is used for a cleaning process, and a roughness is about ⅕ of a size of a nano-sized powder.  
   
   
       10 . The method as set forth in  claim 7 , wherein a material of the ceramic dielectric in the second step is at least one selected from the group consisting of SrTiO 3 , BaTiO 3 , (Ba, Sr)TiO 3 , Pb(Zr, Ti)O 3 , (Pb, La)(Zr, Ti)O 3 , Pb (Ti 1/3 Nb 2/3 )O 3 , Ta 2 O 5 , and Al 2 O 3 .  
   
   
       11 . The method as set forth in  claim 7 , further comprising a sixth step of conducting a pretreatment to improve interfacial adhesion after the second step.  
   
   
       12 . The method as set forth in  claim 7 , wherein the upper electrodes are formed through the thermal spray process in the third step.  
   
   
       13 . The method as set forth in  claim 7 , wherein the upper electrodes are formed through a copper plating process in the third step.  
   
   
       14 . The method as set forth in  claim 7 , further comprising a seventh step of laminating the insulating layers to the same height as the embedded capacitors after the third step.  
   
   
       15 . A method of fabricating a printed circuit board including an embedded capacitor having a high dielectric constant, comprising: 
 a first step of forming first circuit patterns including a plurality of lower electrodes of the embedded capacitors on a copper foil on one side of a copper clad laminate, and packing an insulating material between the first circuit patterns;    a second step of spraying a ceramic dielectric on the copper clad laminate through a thermal spray process to form ceramic films;    a third step of forming second circuit patterns including upper electrodes on a portion of the ceramic films, which correspond to the lower electrodes, formed in the second step; and    a fourth step of laminating insulating layers on the second circuit patterns formed in the third step, and forming through holes for electrically connecting the upper electrodes to external elements.    
   
   
       16 . The method as set forth in  claim 15 , further comprising a fifth step of conducting a pretreatment to improve interfacial adhesion after the first step.  
   
   
       17 . The method as set forth in  claim 15 , wherein the spraying of the ceramic dielectric through the thermal spray process in the second step is conducted under conditions such that a distance between a thermal spray gun and a mother material is 3-4 inches, a moving speed of the thermal spray gun or mother material is 1-2 μm/sec, an air filter is used for a cleaning process, and a roughness is about ⅕ of a size of a nano-sized powder.  
   
   
       18 . The method as set forth in  claim 15 , wherein a material of the ceramic dielectric in the second step is at least one selected from the group consisting of SrTiO 3 , BaTiO 3 , (Ba, Sr)TiO 3 , Pb(Zr, Ti)O 3 , (Pb, La)(Zr, Ti)O 3 , Pb(Ti 1/3 Nb 2/3 )O 3 , Ta 2 O 5 , and Al 2 O 3 .  
   
   
       19 . The method as set forth in  claim 15 , further comprising a sixth step of conducting a pretreatment to improve interfacial adhesion after the second step.