Fabrication method of multichip stacking structure

Abstract

The present invention provides a fabrication method of a multi-chip stacking structure. The method includes steps of: stacking the first chips on the chip carrier in a step-like manner to form a first chip module; electrically connecting the first chip module to the chip carrier by a plurality of first bonding wires; stacking the second chips on the first chip module in step-like manner to form a second chip module, wherein a bottom chip of the second chip module is stacked on a top chip of the first chip module by an adhesive layer with the bottom chip deviated from the top chip horizontally in a direction toward the first bonding wires; and electrically connecting the bond pads of the second chip module to the chip carrier by a plurality of second bonding wires.

1 . A fabrication method of a multichip stacking structure, comprising:
 preparing a chip carrier and a plurality of first and second chips, wherein each chip has a bond pad disposed at an edge of a surface thereof;   stacking the first chips on the chip carrier to form a first chip module, the first chips are stacked in a step-like manner in a first direction away from the bond pads of the first chip to expose the bond pads of the first chips;   electrically connecting the bond pads of the first chips to the chip carrier by a plurality of first bonding wires;   stacking the second chips on the first chip module to form a second chip module, wherein the second chips are stacked in the step-like manner to expose the bond pads of the second chips, a bottom chip of the second chip module is stacked on a top chip of the first chip module by an adhesive layer with the bottom chip deviated from the top chip horizontally in a second direction toward the first bonding wires of the first chips, and a plurality of fillers are disposed within the adhesive layer for supporting the bottom chip; and   electrically connecting the bond pads of the second chips to the chip carrier by a plurality of second bonding wires.   
     
     
         2 . The fabrication method of the multichip stacking structure of  claim 1 , wherein a projection of the second chip module is within that of the first chip module. 
     
     
         3 . The fabrication method of the multichip stacking structure of  claim 1 , further comprising a step of:
 deposing an encapsulant on the chip carrier for encapsulating the first and the second chip modules and the first and the second bonding wires.   
     
     
         4 . The fabrication method of the multichip stacking structure of  claim 1 , wherein projections of the second chips are corresponding to positions of the first chips. 
     
     
         5 . The fabrication method of the multichip stacking structure of  claim 1 , further comprising a step of:
 stacking a third chip module on the second chip module.   
     
     
         6 . The fabrication method of the multichip stacking structure of  claim 1 , wherein the top chip is electrically connected to the chip carrier by using a reverse wire bond method. 
     
     
         7 . The fabrication method of the multichip stacking structure of  claim 1 , wherein the first and second chip modules are electrically connected to the chip carrier by using one of a wire bonding method and a reverse wire bond method. 
     
     
         8 . A fabrication method of a multichip stacking structure, comprising:
 preparing a chip carrier and a plurality of first and second chips, wherein each chip has a bond pad disposed at an edge of a surface thereof;   stacking the first chips on the chip carrier to form a first chip module, wherein the first chips are stacked in a step-like manner in a first direction away from the bond pads of the first chips to expose the bond pads of the first chips;   electrically connecting the bond pads of the first chips to the chip carrier by a plurality of first bonding wires;   stacking the second chips on the first chip module to form a second chip module, wherein the second chips are stacked in the step-like manner to expose the bond pads of the second chips, a bottom chip of the second chip module is stacked on a top chip of the first chip module by an adhesive film with the bottom chip deviated from the top chip horizontally in a second direction toward the first bonding wires of the first chips, and the portion of the first bonding wire of the top chip is covered by the adhesive film; and   electrically connecting the bond pads of the second chips to the chip carrier by a plurality of second bonding wires.   
     
     
         9 . The fabrication method of the multichip stacking structure of  claim 8 , wherein the projection of the second chip module is within that of the first chip module. 
     
     
         10 . The fabrication method of the multichip stacking structure of  claim 8 , further comprising a step of:
 deposing an encapsulant on the chip carrier for encapsulating the first and the second chip modules and the first and the second bonding wires.   
     
     
         11 . The fabrication method of the multichip stacking structure of  claim 8 , wherein projections of the second chips are corresponding to positions of the first chips. 
     
     
         12 . The fabrication method of the multichip stacking structure of  claim 8 , further comprising a step of:
 stacking a third chip module on the second chip module.   
     
     
         13 . The fabrication method of the multichip stacking structure of  claim 8 , wherein the top chip is electrically connected to the chip carrier by a reverse wire bond method. 
     
     
         14 . The fabrication method of the multichip stacking structure of  claim 8 , wherein the first and the second chip modules are electrically connected to the chip carrier by one of a wire bonding method and a reverse wire bond method. 
     
     
         15 . A fabrication method of a multichip stacking structure, comprising:
 preparing a chip carrier and a plurality of first chips;   stacking the first chips on the chip carrier in a step-like manner to form a first chip module;   electrically connecting the first chips to the chip carrier by a plurality of first bonding wires;   stacking at least a second chip on the first chip module by an adhesive layer to form a second chip module, wherein the adhesive layer has a plurality of fillers disposed therein for supporting the second chip module; and   electrically connecting the second chips to the chip carrier by a plurality of second bonding wires.   
     
     
         16 . The fabrication method of the multichip stacking structure of  claim 15 , wherein the projection of the second chip module is within that of the first chip module. 
     
     
         17 . The fabrication method of the multichip stacking structure of  claim 15 , further comprising a step of:
 deposing an encapsulant on the chip carrier for encapsulating the first and the second chip modules and the first and the second bonding wires.   
     
     
         18 . The fabrication method of the multichip stacking structure of  claim 15 , wherein projections of the first chips are corresponding to positions of the second chips. 
     
     
         19 . The fabrication method of the multichip stacking structure of  claim 15 , further comprising a step of:
 stacking a plurality of third chips on the second chip module.   
     
     
         20 . The fabrication method of the multichip stacking structure of  claim 15 , wherein the first and the second chip modules are electrically connected to the chip carrier by one of a wire bonding method and a reverse wire bond method. 
     
     
         21 . The fabrication method of the multichip stacking structure of  claim 15 , wherein a bottom chip of the second chip module is in one of a position corresponding to that of the top chip of the first chip module and a position horizontally deviated from that of a top chip of the first chip module for a distance. 
     
     
         22 . A fabrication method of a multichip stacking structure, comprising:
 preparing a chip carrier and a plurality of first chips;   stacking the first chips on the chip carrier in a step-like manner to form a first chip module;   electrically connecting the first chips to the chip carrier by a plurality of first bonding wires;   stacking at least a second chip on the first chip module by an adhesive film to form a second chip module, wherein a portion of first bonding wires between the second chip module and a top chip of the first chip module is covered by the adhesive film; and   electrically connecting the second chips to the chip carrier by a plurality of second bonding wires.   
     
     
         23 . The fabrication method of the multichip stacking structure of  claim 22 , wherein the projection of the second chip module is within that of the first chip module. 
     
     
         24 . The fabrication method of the multichip stacking structure of  claim 22 , further comprising a step of:
 deposing an encapsulant on the chip carrier for encapsulating the first and the second chip modules and the first and the second bonding wires.   
     
     
         25 . The fabrication method of the multichip stacking structure of  claim 22 , wherein projections of the first chips are corresponding to positions of the second chips. 
     
     
         26 . The fabrication method of the multichip stacking structure of  claim 22 , further comprising a step of:
 stacking a plurality of third chips on the second chip module.   
     
     
         27 . The fabrication method of the multichip stacking structure of  claim 22 , wherein the first and the second chip modules are electrically connected to the chip carrier by one of a wire bonding method and a reverse wire bond method. 
     
     
         28 . The fabrication method of the multichip stacking structure of  claim 22 , wherein a bottom chip of the second chip module is in one of a position corresponding to that of the top chip of the first chip module and a position horizontally deviated from that of the top chip of the first chip module for a distance.