US2008224269A1PendingUtilityA1
Gettering structures and methods and their application
Assignee: SAMSUNG ELECTRONICS CO LTDPriority: Mar 12, 2007Filed: Mar 11, 2008Published: Sep 18, 2008
Est. expiryMar 12, 2027(~0.6 yrs left)· nominal 20-yr term from priority
H10P 36/03H10P 95/00H10D 88/01H10D 88/00H10D 84/038H10B 69/00H10B 10/12H10B 41/35H10B 41/20H10B 10/00H10B 41/30
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Claims
Abstract
An embodiment of a semiconductor device includes a semiconductor substrate, a first insulating layer formed over the semiconductor substrate, and a first semiconductor layer formed over the first insulation layer. At least one gettering region is formed in at least one of the first insulating layer and the first semiconductor layer. The gettering region includes a plurality of gettering sites, and at least one gettering site includes one of a precipitate, a dispersoid, an interface with the dispersoid, a stacking fault and a dislocation.
Claims
exact text as granted — not AI-modified1 . A semiconductor device, comprising:
a semiconductor substrate; a first insulating layer formed over the semiconductor substrate; a first semiconductor layer formed over the first insulation layer; and at least one gettering region formed in at least one of the first insulating layer and the first semiconductor layer, the gettering region including a plurality of gettering sites, at least one gettering site including one of a precipitate, a dispersoid, an interface with the dispersoid, a stacking fault and a dislocation.
2 . The device of claim 1 , wherein the gettering region includes at least one dispersoid at each gettering site.
3 . The device of claim 2 , wherein the dispersoid includes one of nitrogen, carbon and oxygen.
4 . The device of claim 1 , wherein the gettering region includes at least one of stacking faults and dislocations at the gettering sites.
5 . The device of claim 1 , wherein the gettering regions have at least one of the following positions within the first insulating layer,
extending from an upper surface of the first insulating layer to a lower surface of the first insulation layer, extending from below an upper surface of the first insulating layer to a lower surface of the first insulating layer, extending from an upper surface of the first insulating layer to above a lower surface of the first insulation layer, and extending from below an upper surface of the first insulating layer to above a lower surface of the first insulating layer.
6 . The device of claim 5 , wherein at least two of the gettering regions have different positions within the first insulating layer.
7 . The device of claim 1 , further comprising:
at least one semiconductor pattern formed in the first insulating layer, and the gettering region is at least a portion of the semiconductor pattern.
8 . The device of claim 7 , wherein the gettering region includes at least one dispersoid at the gettering sites.
9 . The device of claim 8 , wherein the dispersoid includes one of nitrogen, carbon and oxygen.
10 . The device of claim 7 , wherein the gettering region includes at least one of stacking faults and dislocations at the gettering sites.
11 . The device of claim 7 , wherein the semiconductor pattern one of (i) extends from an upper surface of the first insulating layer to a lower surface of the first insulation layer and (ii) extends from the upper surface of the first insulating layer to above the lower surface of the first insulation layer.
12 . The device of claim 7 , wherein the semiconductor pattern includes at least one of amorphous silicon, single-crystal silicon, polycrystalline silicon.
13 . The device of claim 12 , wherein the semiconductor pattern include polycrystalline silicon having nano scale grains.
14 . The device of claim 7 , further comprising:
a second semiconductor layer over the first insulation layer.
15 . The device of claim 1 , further comprising:
at least one semiconductor pattern formed in the first insulating layer, and a first gettering region is formed in at least a portion of the semiconductor pattern; and a second gettering region not formed in a semiconductor pattern and formed in a portion of the first insulating layer.
16 . The device of claim 1 , further comprising:
a second insulating layer formed over the first semiconductor layer; and wherein at least one gettering region is formed in the second insulating layer.
17 . The device of claim 1 , further comprising:
a second insulating layer formed over the first semiconductor layer.
18 . The device of claim 1 , wherein the gettering region is formed in the first semiconductor layer.
19 . A method of forming a semiconductor structure, comprising:
forming a first insulating layer over a semiconductor substrate; and forming a gettering region in a portion of the first insulating layer, the gettering region including gettering sites.
20 . A method of forming a semiconductor structure, comprising:
forming a first insulating layer over a semiconductor substrate; forming at least one gettering region on the first insulation layer, the gettering region including gettering sites; and forming a second insulating layer over the first insulating layer.
21 . A method of forming a semiconductor structure, comprising:
forming a gettering region layer over a first semiconductor substrate; patterning the first semiconductor substrate and the gettering region layer to form at least one semiconductor substrate projection having a gettering region formed there over; positioning the first semiconductor substrate near a second semiconductor substrate such that the semiconductor substrate projection projects towards a first insulation layer on the second semiconductor substrate; forming a first semiconductor layer over the first insulating layer such that the first semiconductor layer covers the gettering region; and removing the first semiconductor substrate such that at least the gettering region remains in the first semiconductor layer.
22 . A method of forming a semiconductor structure, comprising:
positioning a first semiconductor substrate near a second semiconductor substrate, the second semiconductor substrate having a first insulating layer formed there over and at least one gettering region formed in the first insulating layer, the first semiconductor substrate having projections, and the first semiconductor substrate being positioned such that the projections project towards the first insulating layer; forming a first semiconductor layer over the first insulating layer such that the first semiconductor layer covers a portion of the projections; and removing the first semiconductor substrate such that at least portions of the projections covered by the first semiconductor layer remain in the first semiconductor layer.
23 . A method of forming a semiconductor structure, comprising:
providing a semiconductor substrate having a first insulating layer formed there over and at least one gettering region formed in the first insulating layer; and coating a carrier solution having a solvent and semiconductor crystal patterns over the first insulating layer; removing the solvent to leave the semiconductor crystal patterns; and growing a semiconductor layer on the first insulating layer using the semiconductor crystal patterns as a seed layer.
24 . A method of forming a semiconductor structure, comprising:
providing a semiconductor substrate having a first insulating layer formed there over and at least one gettering region formed in the first insulating layer; and forming at least one semiconductor plug in the first insulation layer; and growing a semiconductor layer on the first insulating layer using the semiconductor plug as a seed layer.Join the waitlist — get patent alerts
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