Layer Transfer Process and Functionally Enhanced Integrated Circuits Products Thereby

Abstract

A structure for a semiconductor components is provided having a device layer sandwiched on both sides by other active, passive, and interconnecting components. A wafer-level layer transfer process is used to create this planar (2D) IC structure with added functional enhancements.

1 . An integrated device structure comprising:
 a first substrate with a first set of functional elements disposed thereon;   a semiconductor device layer on said first set of functional elements; and   and a second set of functional elements on top of said device layer.   
   
   
       2 . A structure according to  claim 1  additionally comprising provisions for packaging interconnections on said second set of functional elements. 
   
   
       3 . A structure according to  claim 1  further comprising a third functional element disposed on said second set of functional elements. 
   
   
       4 . A structure according to  claim 1  wherein said first set of functional elements are selected from the group comprising interconnection wiring, power distribution wiring, ground planes and clock distribution wiring. 
   
   
       5 . A structure according to  claim 1  wherein said first set of functional elements are chosen to provide means for heat dissipation and cooling of the said semiconductor device layer. 
   
   
       6 . A structure according to  claim 1  wherein said second functional element is selected from a group comprising interconnect wiring, optical interconnects, microfluidic interconnects, III-V compound device components and II-VI compound device components. 
   
   
       7 . A structure according to  claim 1  wherein said first and said second functional elements and said semiconductor device layer are electrically interconnected and form an integrated functional system. 
   
   
       8 . A structure according to  claim 1  wherein said first substrate is selected from the group comprising bulk silicon, silicon on insulator, gallium arsenide, glass and ceramic materials. 
   
   
       9 . A structure according to  claim 1  further comprising intermediate layers between said first functional and second functional element and said semiconductor device layer said intermediate layers provide attributes selected from the group consisting of durable adhesion and bonding, diffusion barrier function and passivation. 
   
   
       10 . A structure according to  claim 9  wherein said intermediate layers are selected from the group comprising polyamic acid (PAA)-based polyimides, polyamic ester-based polyimides, and pre-imidized polyimides, spin on glass films, silicon oxide, silicon nitride, silicon carbide, silicon carbonitride and combinations thereof. 
   
   
       11 . A method of forming an integrated device structure comprising:
 a) building a semiconductor device layer on a first substrate;   b) providing a set of first functional elements to connect at least some of the devices in said semiconductor device layer;   c) attaching a carrier substrate on top of said first functional elements;   d) removing said first substrate to expose the bottom side of the said semiconductor device layer;   e) building a set of second functional elements on said exposed bottom side of said semiconductor device layer including electrical connections to at least some of the devices in said semiconductor device layer;   f) attaching a foundation substrate to the exposed surface of said second functional elements;   g) removing said carrier substrate from the top of said second functional elements; and   h) providing input output connections on the exposed top surface of said second functional elements.   
   
   
       12 . A method of forming an integrated device structure comprising:
 a) building a semiconductor device layer on a first substrate;   b) providing a set of first functional elements to connect at least some of the devices in said semiconductor device layer;   c) attaching a carrier substrate on top of said first functional elements;   d) removing said first substrate to expose the bottom side of the said semiconductor device layer;   e) building a set of second functional elements on said exposed bottom side of said semiconductor device layer including electrical connections to at least some of the devices in said semiconductor device layer;   f) attaching a foundation substrate to the exposed surface of said second functional elements;   g) partially thinning said carrier substrate;   h) building through vias and integrated elements in said thinned carrier substrate; and   i) providing input output means such as solder connections and microjoint connections on said thinned carrier substrate.   
   
   
       13 . A method of forming an integrated device structure comprising:
 a) building a semiconductor device layer on a first substrate;   b) providing a set of first functional elements to connect at least some of the devices in said semiconductor device layer;   c) attaching a carrier substrate on top of said first functional elements;   d) removing said first substrate to expose the bottom side of the said semiconductor device layer producing a first intermediate structure;   e) building a set of second functional elements on a foundation substrate to produce a second intermediate structure;   f) bonding said first and said second intermediate structures to form a third intermediate structure;   g) removing said carrier substrate, and;   h) providing input output means on the exposed surface of said first functional elements to form said integrated device structure.   
   
   
       14 . A method of forming an integrated device structure comprising:
 a) building a semiconductor device layer on a first substrate;   b) providing a set of first functional elements to connect at least some of the devices in said semiconductor device layer;   c) attaching a carrier substrate on top of said first functional elements;   d) removing said first substrate to expose the bottom side of the said semiconductor device layer producing a first intermediate structure;   e) building a set of second functional elements on a foundation substrate to produce a second intermediate structure;   f) bonding said first and said second intermediate structures to form a third intermediate structure;   g) partially thinning said carrier substrate;   h) building through vias and integrated passives elements in said thinned carrier substrate; and   i) providing input output means on said thinned carrier substrate to form said integrated device structure.   
   
   
       15 . A method according to  claims 11 ,  12 ,  13  and  14  wherein said first substrate is selected from the group comprising silicon, silicon insulator, glass and quartz. 
   
   
       16 . A method according to  claims 11 ,  12 ,  13  and  14  wherein said first semiconductor device layer comprises devices made of a material selected from silicon, III-V compounds and II-VI compounds. 
   
   
       17 . A method according to  claims 11 ,  12 ,  13  and  14  wherein said first functional elements are selected from the group consisting of interconnect wiring, optical interconnects, microfuidic interconnects and a combination thereof. 
   
   
       18 . A method according to  claims 11 ,  12 ,  13  and  14  wherein said carrier substrate is made of a material selected from the group comprising silicon, glass, quartz and ceramic. 
   
   
       19 . A method according to  claims 11 ,  12 ,  13  and  14  wherein said second set of functional elements are selected form the group consisting of interconnect wiring, power distribution wiring, ground planes, clock network wiring and optical interconnects. 
   
   
       20 . A method according to  claims 11 ,  12 ,  13  and  14  wherein said second set of functional elements further include means to provide heat dissipation and cooling to said semiconductor device layer. 
   
   
       21 . A method according to  claims 11 ,  12 ,  13  and  14  further comprising intermediate layers between said first and said second elements and said semiconductor device layer to provide attributes selected from the group consisting of durable adhesion and bonding, diffusion barrier function, passivation and combinations thereof. 
   
   
       22 . A method according to  claim 21  wherein said optional intermediate layers are selected from the group comprising polyamic acid (PAA)-based polyimides, polyamic ester-based polyimides, pre-imidized polyimides, spin on glasses, silicon oxide, silicon nitride, silicon carbide, silicon carbonitride and combinations thereof.