US2011042778A1PendingUtilityA1

Semiconductor device having localized insulated block in bulk substrate and related method

Assignee: NAT SEMICONDUCTOR CORPPriority: Sep 18, 2007Filed: Nov 1, 2010Published: Feb 24, 2011
Est. expirySep 18, 2027(~1.1 yrs left)· nominal 20-yr term from priority
H10W 10/181H10W 10/061H10P 90/1906H10D 87/00
45
PatentIndex Score
0
Cited by
0
References
0
Claims

Abstract

One or more trenches can be formed around a first portion of a semiconductor substrate, and an insulating layer can be formed under the first portion of the semiconductor substrate. The one or more trenches and the insulating layer electrically isolate the first portion of the substrate from a second portion of the substrate. The insulating layer can be formed by forming a buried layer in the substrate, such as a silicon germanium layer in a silicon substrate. One or more first trenches through the substrate to the buried layer can be formed, and open spaces can be formed in the buried layer (such as by using an etch selective to silicon germanium over silicon). The one or more first trenches and the open spaces can optionally be filled with insulative material(s). One or more second trenches can be formed and filled to isolate the first portion of the substrate.

Claims

exact text as granted — not AI-modified
1 .- 16 . (canceled) 
     
     
         17 . A semiconductor substrate comprising:
 one or more trenches around a first portion of the semiconductor substrate; and   an insulating layer under the first portion of the semiconductor substrate;   wherein the one or more trenches and the insulating layer electrically isolate the first portion of the semiconductor substrate from a second portion of the semiconductor substrate.   
     
     
         18 . The semiconductor substrate of  claim 17 , wherein at least one of the one or more trenches and the insulating layer is at least partially filled with one or more materials. 
     
     
         19 . The semiconductor substrate of  claim 18 , wherein the one or more materials comprise at least one of: an oxide, a nitride, and polysilicon. 
     
     
         20 . The semiconductor substrate of  claim 17 , wherein the one or more trenches comprise:
 one or more first trenches through the insulating layer to a first depth in the semiconductor substrate; and   one or more second trenches through the insulating layer to a second depth in the semiconductor substrate, the second depth deeper than the first depth.   
     
     
         21 . The semiconductor substrate of  claim 17 , wherein the insulating layer comprises a heat sink between the first and second portions of the semiconductor substrate. 
     
     
         22 . The semiconductor substrate of  claim 17 , wherein the insulating layer comprises:
 a portion of a buried layer; and   one or more insulating materials deposited in etched areas of the buried layer.   
     
     
         23 . The semiconductor substrate of  claim 22 , wherein the portion of the buried layer forms a heat sink between the first and second portions of the semiconductor substrate. 
     
     
         24 . The semiconductor substrate of  claim 22 , wherein:
 the portion of the buried layer comprises silicon germanium; and   the semiconductor substrate comprises silicon.   
     
     
         25 . A semiconductor device comprising:
 a semiconductor substrate comprising a first portion and a second portion;   one or more first integrated circuits over the first portion of the semiconductor substrate; and   one or more second integrated circuits over the second portion of the semiconductor substrate;   wherein the first portion of the semiconductor substrate is electrically isolated from the second portion of the semiconductor substrate by an insulating layer; and   wherein the second portion of the semiconductor substrate is void of an insulating layer.   
     
     
         26 . The semiconductor device of  claim 25 , wherein the one or more first integrated circuits are electrically coupled to the one or more second integrated circuits. 
     
     
         27 . The semiconductor device of  claim 25 , wherein the insulating layer comprises:
 a portion of a buried layer; and   one or more insulating materials deposited in etched areas of the buried layer.   
     
     
         28 . The semiconductor device of  claim 27 , wherein the portion of the buried layer forms a heat sink between the first and second portions of the semiconductor substrate. 
     
     
         29 . The semiconductor device of  claim 27 , wherein:
 the portion of the buried layer comprises silicon germanium; and   the semiconductor substrate comprises silicon.   
     
     
         30 . An apparatus comprising:
 a semiconductor substrate comprising a first portion and a second portion; and   an insulating layer under the first portion of the semiconductor substrate;   wherein the insulating layer electrically isolates the first portion of the semiconductor substrate from the second portion of the semiconductor substrate; and   wherein the insulating layer forms a heat sink between the first and second portions of the semiconductor substrate.   
     
     
         31 . The apparatus of  claim 30 , further comprising:
 one or more first integrated circuits over the first portion of the semiconductor substrate; and   one or more second integrated circuits over the second portion of the semiconductor substrate.   
     
     
         32 . The apparatus of  claim 31 , wherein the one or more first integrated circuits are electrically coupled to the one or more second integrated circuits. 
     
     
         33 . The apparatus of  claim 31 , wherein the second portion of the semiconductor substrate is void of an insulating layer. 
     
     
         34 . The apparatus of  claim 30 , wherein the insulating layer comprises:
 a portion of a buried layer; and   one or more insulating materials deposited in etched areas of the buried layer.   
     
     
         35 . The apparatus of  claim 34 , wherein the portion of the buried layer forms the heat sink between the first and second portions of the semiconductor substrate. 
     
     
         36 . The apparatus of  claim 34 , wherein:
 the portion of the buried layer comprises silicon germanium; and   the semiconductor substrate comprises silicon.

Join the waitlist — get patent alerts

Track US2011042778A1 — get alerts on status changes and closely related new filings.

We store only your email — no account needed. See our privacy policy.