Method for fabricating ingan-based multi-quantum well layers

Abstract

A method for fabricating quantum wells by using indium gallium nitride (InGaN) semiconductor material includes fabricating a potential well on a layered group III-V nitride structure at a first predetermined temperature in a reactor chamber by injecting into the reactor chamber an In precursor gas and a Ga precursor gas. The method further includes, subsequent to the fabrication of the potential well, terminating the Ga precursor gas, maintaining a flow of the In precursor gas, and increasing the temperature in the reactor chamber to a second predetermined temperature while adjusting the In precursor gas flow rate from a first to a second flow rate. In addition, the method includes annealing and stabilizing the potential well at the second predetermined temperature while maintaining the second flow rate. The method also includes fabricating a potential barrier above the potential well at the second predetermined temperature while resuming the Ga precursor gas.

1 . A method for fabricating an active region comprising at least one quantum well by using indium gallium nitride (InGaN) semiconductor material, the method comprising:
 fabricating a potential well on a layered group III-V nitride structure at a first predetermined temperature in a reactor chamber by injecting into the reactor chamber an In precursor gas and a Ga precursor gas;   subsequent to the fabrication of the potential well, terminating the Ga precursor gas, maintaining a flow of the In precursor gas, and increasing the temperature in the reactor chamber to a second predetermined temperature while adjusting the In precursor gas flow rate from a first to a second flow rate;   annealing and stabilizing the potential well at the second predetermined temperature while maintaining the second flow rate; and   fabricating a potential barrier above the potential well at the second predetermined temperature while resuming the Ga precursor gas.   
     
     
         2 . The method of  claim 1 , wherein the layered group III-V nitride structure comprises a substrate, a buffer layer; and an n-type semiconductor layer. 
     
     
         3 . The method of  claim 1 , wherein the first predetermined temperature is between 700° C. and 950° C. 
     
     
         4 . The method of  claim 1 , wherein fabricating the potential well involves maintaining the In and Ga precursor flows for 50 to 200 seconds. 
     
     
         5 . The method of  claim 1 , wherein the In precursor gas is TMIn. 
     
     
         6 . The method of  claim 5 , wherein fabricating the potential well comprises injecting the TMIn gas at a flow rate that is between 160 and 360 sccm. 
     
     
         7 . The method of  claim 1 , wherein the Ga precursor gas is TMGa, and fabricating the potential well comprises injecting the TMGa gas at a flow rate that is between 0.4 and 2.4 sccm. 
     
     
         8 . The method of  claim 1 , wherein the second predetermined temperature is between 850° C. and 1050° C. 
     
     
         9 . The method of  claim 1 , wherein the first flow rate of the In precursor gas is between 25 and 100 sccm. 
     
     
         10 . The method of  claim 1 , wherein the second flow rate of the In precursor gas is between 50 and 300 sccm. 
     
     
         11 . The method of  claim 1 , wherein the increasing to the second predetermined temperature is performed over 25 to 400 seconds. 
     
     
         12 . A light-emitting device having an active region comprising at least one quantum well based on InGaN semiconductor material, the device comprising:
 a layered group III-V nitride structure;   a potential well on the layered group III-V nitride structure, wherein the potential well is fabricated by:
 placing the layered group III-V nitride structure in a reactor chamber at a first predetermined temperature; 
 injecting into the reactor chamber an In precursor gas and a Ga precursor gas; 
 subsequent to the fabrication of the potential well, terminating the Ga precursor gas, maintaining a flow of the In precursor gas, and increasing the temperature in the reactor chamber to a second predetermined temperature while adjusting the In precursor gas flow rate from a first to a second flow rate; and 
 annealing and stabilizing the potential well at the second predetermined temperature while maintaining the second flow rate; 
   a barrier fabricated above the potential well at a second predetermined temperature; and   a group III-V p-type nitride layer.   
     
     
         13 . The device of  claim 12 , wherein the layered group III-V nitride structure comprises a buffer layer; and an n-type semiconductor layer. 
     
     
         14 . The device of  claim 12 , wherein the first predetermined temperature is between 700° C. and 950° C. 
     
     
         15 . The device of  claim 12 , wherein injecting the In and Ga precursor gas comprises maintaining the In and Ga precursor flows for 50 to 200 seconds. 
     
     
         16 . The device of  claim 12 , wherein the In precursor gas is TMIn. 
     
     
         17 . The device of  claim 16 , wherein injecting the In precursor gas comprises injecting the TMIn gas at a flow rate that is between 160 and 360 sccm. 
     
     
         18 . The device of  claim 12 , wherein the Ga precursor gas is TMGa, and wherein injecting the Ga precursor gas comprises injecting the TMGa gas at a flow rate that is between 0.4 and 2.4 sccm. 
     
     
         19 . The device of  claim 12 , wherein the second predetermined temperature is between 850° C. and 1050° C. 
     
     
         20 . The device of  claim 12 , wherein the first flow rate of the In precursor gas is between 25 and 100 sccm. 
     
     
         21 . The device of  claim 12 , wherein the second flow rate of the In precursor gas is between 50 and 300 sccm. 
     
     
         22 . The device of  claim 12 , wherein the increasing to the second predetermined temperature is performed over 25 to 400 seconds.