Fabrication method of semiconductor integrated circuit device

Abstract

To permit electrical testing of a semiconductor integrated circuit device having test pads disposed at narrow pitches probes in a pyramid or trapezoidal pyramid form are formed from metal films formed by stacking a rhodium film and a nickel film successively. Via through-holes are formed in a polyimide film between interconnects and the metal films, and the interconnects are electrically connected to the metal films. A plane pattern of one of the metal films equipped with one probe and through-hole is obtained by turning a plane pattern of the other metal film equipped with the other probe and through-hole through a predetermined angle.

1 . A fabrication method of a semiconductor integrated circuit device comprising the steps of:
 (a) preparing a semiconductor wafer which has been partitioned into a plurality of chip regions each having a semiconductor integrated circuit formed thereover, and has, formed over the main surface of the wafer, a plurality of first electrodes to be electrically connected to the semiconductor integrated circuit;   (b) preparing a first card comprising a wiring substrate having first interconnects formed thereover; a first sheet having a plurality of contact terminals to be brought into contact with the first electrodes and second interconnects to be electrically connected to the contact terminals, said second interconnects being electrically connected to the first interconnects and tip portions of the contact terminals being fixed to the wiring substrate so as to be opposite to the main surface of the semiconductor wafer; and a pressing mechanism for pressing, from the rear surface of the first sheet, a region of the first sheet in which the contact terminals have been formed; and   (c) performing electrical testing of the semiconductor integrated circuit by bringing the tip portions of the contact terminals into contact with the first electrodes,   wherein each of the tip portions of the contact terminals is disposed over the main surface of the first sheet so as to be opposite to the corresponding one of the first electrodes, and   wherein a first area of an electrical contact surface between the tip portion of a first contact terminal, of the contact terminals, through which a relatively large current flows upon the electrical testing, and the first electrode, is greater than a second area of an electrical contact surface between the tip portion of a second contact terminal, of the contact terminals, through which a relatively small current flows upon the electrical testing and the first electrode.   
     
     
         2 . A fabrication method of a semiconductor integrated circuit device according to  claim 1 ,
 wherein the tip portion of each of the contact terminals is equipped with a protrusion in the pyramid or trapezoidal pyramid form, and   wherein the number of the protrusions at the tip portion of the first contact terminal is greater than that at the tip portion of the second contact terminal.   
     
     
         3 . A fabrication method of a semiconductor integrated circuit device according to  claim 1 ,
 wherein the tip portion of each of the contact terminals is equipped with a protrusion in the pyramid or trapezoidal pyramid form, and   wherein the protrusion disposed at the tip portion of the first contact terminal has a larger size, in plan view, than that disposed at the tip portion of the second contact terminal and these protrusions are equal in height.