Package assembly having a semiconductor substrate

Abstract

Embodiments of the present disclosure provide a method that includes providing a semiconductor substrate comprising a semiconductor material, forming a dielectric layer on the semiconductor substrate, forming an interconnect layer on the dielectric layer, attaching a semiconductor die to the semiconductor substrate, and electrically coupling an active side of the semiconductor die to the interconnect layer, the interconnect layer to route electrical signals of the semiconductor die. Other embodiments may be described and/or claimed.

1 . A method comprising:
 providing a semiconductor substrate comprising a semiconductor material;   forming a dielectric layer on the semiconductor substrate;   forming an interconnect layer on the dielectric layer;   attaching a semiconductor die to the semiconductor substrate; and   electrically coupling an active side of the semiconductor die to the interconnect layer, the interconnect layer to route electrical signals of the semiconductor die.   
     
     
         2 . The method of  claim 1 , wherein:
 the semiconductor die is attached to the semiconductor substrate in a flip-chip configuration; and   the active side of the semiconductor die is electrically coupled to the interconnect layer using one or more bumps.   
     
     
         3 . The method of  claim 1 , wherein:
 the semiconductor die is attached to the semiconductor substrate in a wire-bonding configuration;   an inactive side of the semiconductor die is attached to the semiconductor substrate using an adhesive; and   the active side of the semiconductor die is electrically coupled to the interconnect layer using one or more bonding wires.   
     
     
         4 . The method of  claim 1 , further comprising:
 forming a molding compound to substantially encapsulate the semiconductor die.   
     
     
         5 . The method of  claim 4 , wherein the semiconductor die is attached to a first side of the semiconductor substrate, the method further comprising:
 forming a molding compound to substantially cover a second side of the semiconductor substrate, the second side being disposed opposite to the first side of the semiconductor substrate.   
     
     
         6 . The method of  claim 1 , wherein the semiconductor die is attached to a first side of the semiconductor substrate, the method further comprising:
 thermally coupling a heat spreader to a second side of the semiconductor substrate, the second side being disposed opposite to the first side of the semiconductor substrate.   
     
     
         7 . The method of  claim 1 , wherein the semiconductor die is attached to a first side of the semiconductor substrate, the method further comprising:
 removing portions of the semiconductor material from a second side of the semiconductor substrate to increase a surface area of the second side, the second side being disposed opposite to the first side of the semiconductor substrate.   
     
     
         8 . The method of  claim 1 , wherein the semiconductor die is a first semiconductor die, the method further comprising:
 electrically coupling an active side of a second semiconductor die to the interconnect layer.   
     
     
         9 . The method of  claim 8 , wherein:
 an inactive side of the second semiconductor die is attached to the first semiconductor die using an adhesive; and   the active side of the second semiconductor die is electrically coupled to the interconnect layer using one or more bonding wires.   
     
     
         10 . The method of  claim 1 , further comprising:
 forming a de-coupling capacitor on the semiconductor substrate; and   forming an electro-static discharge (ESD) protection device on the semiconductor substrate to protect against electro-static discharge, wherein the de-coupling capacitor and the ESD protection device are formed prior to attaching the semiconductor die to the semiconductor substrate.   
     
     
         11 . An apparatus comprising:
 a semiconductor substrate comprising a semiconductor material;   a dielectric layer formed on the semiconductor substrate;   an interconnect layer formed on the dielectric layer; and   a semiconductor die attached to the semiconductor substrate, wherein an active side of the semiconductor die is electrically coupled to the interconnect layer, the interconnect layer to route electrical signals of the semiconductor die.   
     
     
         12 . The apparatus of  claim 11 , wherein:
 the semiconductor die is attached to the semiconductor substrate in a flip-chip configuration; and   the active side of the semiconductor die is electrically coupled to the interconnect layer using one or more bumps.   
     
     
         13 . The apparatus of  claim 11 , wherein:
 the semiconductor die is attached to the semiconductor substrate in a wirebonding configuration;   an inactive side of the semiconductor die is attached to the semiconductor substrate using an adhesive; and   the active side of the semiconductor die is electrically coupled to the interconnect layer using one or more bonding wires.   
     
     
         14 . The apparatus of  claim 11 , further comprising:
 one or more package interconnect structures formed on the interconnect layer to further route the electrical signals of the semiconductor die.   
     
     
         15 . The apparatus of  claim 14 , further comprising:
 a printed circuit board, wherein the semiconductor substrate is (i) mounted on the printed circuit board and (ii) electrically coupled to the printed circuit board using the one or more package interconnect structures.   
     
     
         16 . The apparatus of  claim 11 , further comprising:
 a molding compound disposed to substantially encapsulate the semiconductor die.   
     
     
         17 . The apparatus of  claim 11 , wherein the semiconductor die is attached to a first side of the semiconductor substrate, the apparatus further comprising:
 a molding compound disposed to substantially cover a second side of the semiconductor substrate, the second side being disposed opposite to the first side of the semiconductor substrate.   
     
     
         18 . The apparatus of  claim 11 , wherein the semiconductor die is attached to a first side of the semiconductor substrate, the apparatus further comprising:
 a heat spreader thermally coupled to a second side of the semiconductor substrate, the second side being disposed opposite to the first side of the semiconductor substrate.   
     
     
         19 . The apparatus of  claim 11 , wherein the semiconductor die is attached to a first side of the semiconductor substrate, the apparatus further comprising:
 one or more recessed regions formed in the second side of the semiconductor substrate to increase a surface area of the second side of the semiconductor substrate.   
     
     
         20 . The apparatus of  claim 11 , wherein the semiconductor die is a first semiconductor die, the apparatus further comprising:
 a second semiconductor die, wherein an active side of the second semiconductor die is electrically coupled to the interconnect layer.   
     
     
         21 . The apparatus of  claim 20 , wherein:
 an inactive side of the second semiconductor die is attached to the first semiconductor die using an adhesive; and   the active side of the second semiconductor die is electrically coupled to the interconnect layer using one or more bonding wires.   
     
     
         22 . The apparatus of  claim 11 , wherein the semiconductor substrate comprises:
 a de-coupling capacitor formed on the semiconductor substrate to reduce noise associated with the electrical signals; and   an electro-static discharge (ESD) protection device formed on the semiconductor substrate to protect against electro-static discharge.   
     
     
         23 . The apparatus of  claim 11 , wherein:
 the semiconductor substrate comprises silicon;   the semiconductor die comprises silicon;   the dielectric layer comprises at least one of silicon dioxide (SiO 2 ), silicon nitride (SiN), and silicon oxynitride (SiO x N y ); and   the interconnect layer comprises a metal.