Self aligned triple patterning

Abstract

Embodiments of the present invention pertain to methods of forming features on a substrate using a self-aligned triple patterning (SATP) process. A stack of layers is patterned near the optical resolution of a photolithography system using a high-resolution photomask. The heterogeneous stacks are selectively etched to undercut a hard mask layer beneath overlying cores. A dielectric layer, which is flowable during formation, is deposited and fills the undercut regions as well as the regions between the heterogeneous stacks. The dielectric layer is anisotropically etched and a conformal spacer is deposited on and between the cores. The spacer is anisotropically etched to leave two spacers between each core. The cores are stripped and the spacers are used together with the remaining hard mask features to pattern the substrate at triple the density of the original pattern.

1 . A method of patterning a substrate, the method comprising:
 forming a stack of flat layers on a substrate comprising the sequential steps of
 forming a flat spacer layer over the substrate, and 
 forming a flat core layer over the flat spacer layer; 
   patterning the stack of flat layers to form flat spacers and cores spaced according to a lithographic pitch, wherein the width of the cores is about one half of the lithographic pitch;   selectively etching the flat spacers, wherein the flat spacers are thinned relative to the cores;   forming a dielectric layer on the patterned substrate, wherein the dielectric layer is flowable during formation;   solidifying the dielectric layer   anisotropically etching the dielectric layer to expose the sides of the cores;   forming a conformal spacer layer over the cores;   anisotropically etching the conformal spacer layer, wherein two conformal spacers are formed between an adjacent pair of flat spacers and wherein the two conformal spacers in combination with the flat spacers are horizontally spaced at about one third of the lithographic pitch; and   stripping away the cores.   
     
     
         2 . The method of  claim 1  further comprising anisotropically etching the dielectric layer to expose three regions of the substrate between the adjacent pair of flat spacers. 
     
     
         3 . The method of  claim 1  wherein the cores are spaced according to the lithographic pitch are formed at or near the optical resolution of a photolithography system using a high resolution photomask. 
     
     
         4 . The method of  claim 1  wherein a thickness of the conformal spacer layer is between about 30% and about 36% of the width of the cores. 
     
     
         5 . The method of  claim 1  further comprising the additional sequential steps of:
 anisotropically etching the dielectric layer, after stripping away the cores, to expose the substrate; and 
 transferring the pattern defined by the flat spacers and the conformal spacers into the substrate, wherein the pitch of the transferred pattern is about one third of the lithographic pitch. 
 
     
     
         6 . The method of  claim 1  wherein the flat spacers and the conformal spacers are made from the same material. 
     
     
         7 . The method of  claim 1  wherein the flat spacers and the conformal spacers are made from different materials. 
     
     
         8 . The method of  claim 1  wherein the flat spacers comprise one of polysilicon, metal, silicon oxide or silicon nitride. 
     
     
         9 . The method of  claim 1  wherein the conformal spacers comprise one of polysilicon, metal, silicon oxide or silicon nitride. 
     
     
         10 . The method of  claim 1  wherein the cores comprises one of dspin-on carbon or APF®. 
     
     
         11 . The method of  claim 1  wherein the layer of sacrificial structural material comprises spin-on carbon.