Self-aligned contacts

Abstract

A method of forming a gate structure with a self-aligned contact is provided and includes sequentially depositing a sacrificial layer and a secondary layer onto poly-Si disposed at a location of the gate structure, encapsulating the sacrificial layer, the secondary layer and the poly-Si, removing the sacrificial layer through openings formed in the secondary layer and forming silicide within at least the space formally occupied by the sacrificial layer.

1 . A transistor gate, comprising:
 a channel extending between source and drain regions;   a gate structure disposed on the channel between the source and drain regions and having at least partial silicidation for a self-aligned contact;   an encapsulation assembly to fully encapsulate the gate structure in lateral and radial directions;   conductive elements electrically coupled with silicide formed at the source and drain regions; and   an insulator having an etch chemistry different from that of the encapsulation assembly, which is substantially entirely interposed between the encapsulation assembly and the conductive elements.   
     
     
         2 . The transistor gate according to  claim 1 , wherein the gate structure comprises poly-Si and silicide. 
     
     
         3 . The transistor gate according to  claim 1 , wherein the gate structure is fully silicided (FUSI). 
     
     
         4 . A transistor gate, comprising:
 a channel;   a gate structure disposed on the channel and having at least partial silicidation for a self-aligned contact;   an encapsulation assembly to fully encapsulate the gate structure in lateral and radial directions;   conductive elements electrically coupled with silicide; and   an insulator having an etch chemistry different from that of the encapsulation assembly, which is substantially entirely interposed between the encapsulation assembly and the conductive elements.   
     
     
         5 . The transistor gate according to  claim 1 , wherein the gate structure comprises poly-Si and silicide. 
     
     
         6 . The transistor gate according to  claim 1 , wherein the gate structure is fully silicided (FUSI).