US2013102122A1PendingUtilityA1

Semiconductor package and method for making the same

Assignee: CHEN CHIEN-HUAPriority: Dec 31, 2009Filed: Dec 12, 2012Published: Apr 25, 2013
Est. expiryDec 31, 2029(~3.5 yrs left)· nominal 20-yr term from priority
H10W 90/754H10W 90/00H10W 74/00H10W 72/00H10W 70/685H10W 70/635H10W 44/601H10W 44/501H10W 20/023H10W 20/0245H10W 20/216H10D 1/692H10D 1/20H10D 1/68H01L 28/10H01L 28/40
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Claims

Abstract

The present invention relates to a semiconductor package and a method for making the same. The method includes the steps of: (a) providing a base material; (b) forming a first metal layer on the base material, wherein the first metal layer comprises a first inductor and a first lower electrode; (c) forming a first dielectric layer and a first upper electrode on the first lower electrode, wherein the first dielectric layer is disposed between the first upper electrode and the first lower electrode, and the first upper electrode, the first dielectric layer and the first lower electrode form a first capacitor; and (d) forming a first protective layer, so as to encapsulate the first inductor and the first capacitor.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . A method for making a semiconductor package, comprising the steps of
 (a) providing a base material, wherein the base material comprises at least one groove, at least one conductive via structure, a first surface and a second surface, the groove penetrates the first surface and the second surface of the base material, and the conductive via structure is disposed in the groove and exposed on the first surface and the second surface so as to form a through via structure;   (b) forming a first metal layer on the first surface of the base material, wherein the first metal layer comprises a first inductor and a first lower electrode, and directly contacts the through via structure;   (c) forming a first dielectric layer and a first upper electrode on the first lower electrode, wherein the first dielectric layer is disposed between the first upper electrode and the first lower electrode, and the first upper electrode, the first dielectric layer and the first lower electrode form a first capacitor; and   (d) forming a first protective layer, so as to encapsulate the first inductor and the first capacitor.   
     
     
         2 . The method according to  claim 1 , further comprising a step of forming a first insulation layer on the first surface of the base material after step (a), wherein in step (b), the first metal layer is disposed on the first insulation layer. 
     
     
         3 . The method according to  claim 1 , further comprising a step of forming at least one electrical device after step (b), wherein the at least one electrical device is disposed on the second surface of the base material. 
     
     
         4 . The method according to  claim 1 , wherein step (b) comprises the following steps:
 (b1) forming a first seed layer on the base material;   (b2) forming a first photoresist on the first seed layer, so as to cover part of the first seed layer and expose part of the first seed layer;   (b3) forming a first plated layer on the exposed part of the first seed layer; and   (b4) removing the first photoresist and the covered part of the first seed layer, wherein the first plated layer and part of the first seed layer form the first metal layer.   
     
     
         5 . The method according to  claim 1 , wherein step (c) comprises the following steps:
 (c1) forming a second metal layer on the first lower electrode and anodizing the second metal layer, so as to form a first oxidation layer;   (c2) forming a third metal layer on the first oxidation layer;   (c3) forming a second photoresist on the third metal layer; and   (c4) removing part of the first oxidation layer and part of the third metal layer, so as to form the first dielectric layer and the first upper electrode, respectively, and form the first capacitor; and   (c5) removing the second photoresist.   
     
     
         6 . The method according to  claim 1 , wherein in step (d), the first protective layer comprises at least one first opening, and the first opening exposes part of the first metal layer or part of the first upper electrode. 
     
     
         7 . A method for making a semiconductor package, comprising the steps of:
 (a) providing a base material, wherein the base material comprises at least one groove, at least one conductive via structure, a first surface and a bottom surface, the groove opens at the first surface of the base material, and the conductive via structure is disposed in the groove and exposed on the first surface;   (b) forming a first metal layer on the first surface of the base material, wherein the first metal layer comprises a first inductor and a first lower electrode, and directly contacts the conductive via structure;   (c) forming a first dielectric layer and a first upper electrode on the first lower electrode, wherein the first dielectric layer is disposed between the first upper electrode and the first lower electrode, and the first upper electrode, the first dielectric layer and the first lower electrode form a first capacitor; and   (d) forming a first protective layer, so as to encapsulate the first inductor and the first capacitor.   
     
     
         8 . The method according to  claim 7 , further comprising a step of forming a first insulation layer on the first surface of the base material after step (a), wherein in step (b), the first metal layer is disposed on the first insulation layer. 
     
     
         9 . The method according to  claim 7 , further comprising the following steps after step (d):
 (e) disposing the base material on a carrier, wherein the first surface of the base material faces the carrier;   (f) removing part of the base material from the bottom surface, to form a second surface and to expose the conductive via structure on the second surface, so as to form a through via structure;   (g) forming at least one electrical device on the second surface of the base material; and   (h) removing the carrier.   
     
     
         10 . The method according to  claim 9 , further comprising a step of forming at least one electrical device after step (h), wherein the at least one electrical device is disposed on the second surface of the base material. 
     
     
         11 . The method according to  claim 7 , wherein step (b) comprises the following steps:
 (b1) forming a first seed layer on the base material;   (b2) forming a first photoresist on the first seed layer, so as to cover part of the first seed layer and expose part of the first seed layer;   (b3) forming a first plated layer on the exposed part of the first seed layer; and   (b4) removing the first photoresist and the covered part of the first seed layer, wherein the first plated layer and part of the first seed layer form the first metal layer.   
     
     
         12 . The method according to  claim 7 , wherein step (c) comprises the following steps:
 (c1) forming a second metal layer on the first lower electrode and anodizing the second metal layer, so as to form a first oxidation layer;   (c2) forming a third metal layer on the first oxidation layer;   (c3) forming a second photoresist on the third metal layer; and   (c4) removing part of the first oxidation layer and part of the third metal layer, so as to form the first dielectric layer and the first upper electrode, respectively, and form the first capacitor; and   (c5) removing the second photoresist.   
     
     
         13 . The method according to  claim 7 , wherein in step (d), the first protective layer comprises at least one first opening, and the first opening exposes part of the first metal layer or part of the first upper electrode. 
     
     
         14 . A method for making a semiconductor package, comprising the steps of:
 (a) providing a base material, wherein the base material comprises at least one groove, at least one conductive via structure, a top surface and a second surface, the groove opens at the second surface of the base material, and the conductive via structure is disposed in the groove and exposed on the second surface of the base material;   (b) forming a first metal layer on the base material, wherein the first metal layer comprises a first inductor and a first lower electrode, and directly contacts the conductive via structure;   (c) forming a first dielectric layer and a first upper electrode on the first lower electrode, wherein the first dielectric layer is disposed between the first upper electrode and the first lower electrode, and the first upper electrode, the first dielectric layer and the first lower electrode form a first capacitor; and   (d) forming a first protective layer, so as to encapsulate the first inductor and the first capacitor.   
     
     
         15 . The method according to  claim 14 , further comprising a step of forming a first insulation layer on the base material after step (a), wherein in step (b), the first metal layer is disposed on the first insulation layer. 
     
     
         16 . The method according to  claim 14 , further comprising the following steps after step (a):
 (a1) forming at least one electrical device on the second surface of the base material;   (a2) disposing the base material on a carrier, wherein the second surface of the base material faces the carrier; and   (a3) removing part of the base material from the top surface, to form a first surface and to expose the conductive via structure on the first surface, so as to form a through via structure.   
     
     
         17 . The method according to  claim 16 , wherein in step (b), the first metal layer is disposed on the first surface of the base material. 
     
     
         18 . The method according to  claim 14 , wherein step (b) comprises the following steps:
 (b1) forming a first seed layer on the base material;   (b2) forming a first photoresist on the first seed layer, so as to cover part of the first seed layer and expose part of the first seed layer;   (b3) forming a first plated layer on the exposed part of the first seed layer; and   (b4) removing the first photoresist and the covered part of the first seed layer, wherein the first plated layer and part of the first seed layer form the first metal layer.   
     
     
         19 . The method according to  claim 14 , wherein step (c) comprises the following steps:
 (c1) forming a second metal layer on the first lower electrode and anodizing the second metal layer, so as to form a first oxidation layer;   (c2) forming a third metal layer on the first oxidation layer;   (c3) forming a second photoresist on the third metal layer; and   (c4) removing part of the first oxidation layer and part of the third metal layer, so as to form the first dielectric layer and the first upper electrode, respectively, and form the first capacitor; and   (c5) removing the second photoresist.   
     
     
         20 . The method according to  claim 14 , wherein in step (d), the first protective layer comprises at least one first opening, and the first opening exposes part of the first metal layer or part of the first upper electrode.

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