Method of replacing silicon with metal in integrated circuit chip fabrication

Abstract

A method of replacing semiconductor material with metal, Replacement Metal Gate Field Effect Transistors (RMG FETs) and Contacts (RMCs), and Integrated Circuit (IC) chips including the FETs and/or RMCs. A patterned semiconductor layer, e.g., silicon, is formed on a dielectric layer, e.g., a layered gate dielectric. A field dielectric layer fills between shapes in the patterned semiconductor layer. Metal is deposited on the shapes. The wafer is annealed to replace semiconductor in each shape with metal to form metal FET gates or contacts.

What is claimed is: 
     
         1 . An Integrated Circuit (IC) chip including a plurality of Field Effect Transistors (FETs) connected together into one or more circuits, said IC comprising:
 a plurality of silicon islands in a surface silicon layer of a Silicon On Insulator (SOI) wafer;   at least one island including a FET having a metal gate on a layered dielectric on said at least one island; and   wiring connecting FETs together into one or more IC circuits.   
     
     
         2 . An IC chip as in  claim 1 , wherein said layered gate dielectric comprises:
 a high-k dielectric layer on the silicon surface of said at least one island;   a conductive barrier layer on said high-k dielectric layer; and   a second conductive barrier/transition layer on said conductive barrier layer, said metal gate being on said second conductive barrier/transition layer.   
     
     
         3 . An IC chip as in  claim 1 , wherein said wiring includes at least one contact layer, contacts in said at least one contact layer comprising:
 metal caps on said metal gates below said at least one contact layer; and   a metal contact on each metal cap.   
     
     
         4 . An IC chip as in  claim 3 , wherein said metal is aluminum. 
     
     
         5 . An IC chip as in  claim 4 , wherein each said aluminum gate is no longer than twenty two nanometers (22 nm) thick at said layered gate dielectric, at least 100 nm tall and is thinnest at said layered gate dielectric.