US2014035070A1PendingUtilityA1

Metal oxide semiconductor transistor

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Assignee: UNITED MICROELECTRONICS CORPPriority: Jul 22, 2011Filed: Oct 4, 2013Published: Feb 6, 2014
Est. expiryJul 22, 2031(~5 yrs left)· nominal 20-yr term from priority
H10D 64/01318H10D 64/685H10D 30/601H10D 84/0184H10D 84/0177H10D 84/038H10D 64/667H10D 64/018H10D 64/017H10D 30/0227H10D 30/60H10D 64/669H01L 29/78
49
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Claims

Abstract

A MOS transistor including a silicon substrate, a first gate structure and a second gate structure disposed on the silicon substrate is provided. The first gate structure and the second gate structure each includes a high-k dielectric layer disposed on the silicon substrate, a barrier layer disposed on the high-k dielectric layer, and a work function layer disposed on and contacted with the barrier layer. The MOS transistor further includes a dielectric material spacer. The dielectric material spacer is disposed on the barrier layer of each of the first gate structure and the second gate structure and surrounding the work function layer of each of the first gate structure and the second gate structure.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . A MOS transistor, comprising:
 a silicon substrate;   a gate structure, disposed on the silicon substrate, the gate structure comprising:
 a high-k dielectric layer disposed on the silicon substrate; 
 a barrier layer disposed on the high-k dielectric layer; and 
 a work function layer disposed on and contacted with the barrier layer; and 
   a dielectric material spacer disposed on the barrier layer of the gate structure and surrounding the work function layer of the gate structure.   
     
     
         2 . The MOS transistor as claimed in  claim 1 , wherein the gate structure further comprises an interface layer, disposed between the high-k dielectric layer and the silicon substrate. 
     
     
         3 . The MOS transistor as claimed in  claim 2 , wherein the work function layer comprises a titanium nitride layer and a titanium aluminum layer on the titanium nitride layer. 
     
     
         4 . The MOS transistor as claimed in  claim 2 , wherein the work function layer comprises a titanium aluminum layer. 
     
     
         5 . The MOS transistor as claimed in  claim 1 , wherein the barrier layer is a titanium nitride layer. 
     
     
         6 . The MOS transistor as claimed in  claim 1 , further comprising a conductive material layer disposed on the work function layer. 
     
     
         7 . The MOS transistor as claimed in  claim 6 , wherein the conductive material layer is an aluminum layer.

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