US2017121813A1PendingUtilityA1

Method and apparatus for cleaning a cvd chamber

59
Assignee: APPLIED MATERIALS INCPriority: Jan 27, 2003Filed: Jan 17, 2017Published: May 4, 2017
Est. expiryJan 27, 2023(expired)· nominal 20-yr term from priority
H10P 72/0432H01J 37/32082C23C 16/4405C23C 16/458C23C 16/46H01J 37/32862H01L 21/67103
59
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Claims

Abstract

The present invention is a method and apparatus for cleaning a chemical vapor deposition (CVD) chamber using cleaning gas energized to a plasma in a gas mixing volume separated by an electrode from a reaction volume of the chamber. In one embodiment, a source of RF power is coupled to a lid of the chamber, while a switch is used to couple a showerhead to ground terminals or the source of RF power.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . A semiconductor processing chamber, comprising:
 a substrate support;   a lid;   a blocking plate, wherein the lid and the blocking plate define a plasma region;   a gas distribution plate located between the substrate support and the blocking plate and coupled to the blocking plate, wherein the gas distribution plate and the blocking plate define a gas mixing volume, and the gas distribution plate and the substrate support define a reaction volume; and   a first RF connection that couples to the lid, wherein the lid is electrically isolated from the substrate support and the blocking plate.   
     
     
         2 . The semiconductor processing chamber of  claim 1 , wherein the substrate support comprises a heater. 
     
     
         3 . The semiconductor processing chamber of  claim 1 , further comprising a conductive sidewall. 
     
     
         4 . The semiconductor processing chamber of  claim 3 , wherein the conductive sidewall is grounded. 
     
     
         5 . The semiconductor processing chamber of  claim 1 , further comprising a second RF connection that couples to the substrate support. 
     
     
         6 . A semiconductor processing chamber, comprising:
 a substrate support;   a lid;   a blocking plate, wherein the lid and the blocking plate define a plasma region;   a gas distribution plate located between the substrate support and the blocking plate;   a first RF connection that couples to the lid, wherein the lid is electrically isolated from the substrate support and the blocking plate; and   a second RF connection that couples to the substrate support.   
     
     
         7 . The semiconductor processing chamber of  claim 6 , wherein the gas distribution plate and the blocking plate define a gas mixing volume. 
     
     
         8 . The semiconductor processing chamber of  claim 6 , wherein the gas distribution plate and the substrate support define a reaction volume. 
     
     
         9 . The semiconductor processing chamber of  claim 6 , wherein the substrate support comprises a heater. 
     
     
         10 . The semiconductor processing chamber of  claim 6 , further comprising a conductive sidewall. 
     
     
         11 . The semiconductor processing chamber of  claim 6 , wherein the conductive sidewall is grounded. 
     
     
         12 . A semiconductor processing chamber, comprising:
 a substrate support;   a lid;   a blocking plate, wherein the lid and the blocking plate define a plasma region;   a gas distribution plate located between the substrate support and the blocking plate and coupled to the blocking plate;   a first RF connection that couples to the lid, wherein the lid is electrically isolated from the substrate support and the blocking plate; and   a second RF connection that couples to the substrate support.   
     
     
         13 . The semiconductor processing chamber of  claim 12 , wherein the gas distribution plate and the blocking plate define a gas mixing volume. 
     
     
         14 . The semiconductor processing chamber of  claim 12 , wherein the gas distribution plate and the substrate support define a reaction volume. 
     
     
         15 . The semiconductor processing chamber of  claim 12 , wherein the substrate support comprises a heater. 
     
     
         16 . The semiconductor processing chamber of  claim 12 , further comprising a conductive sidewall. 
     
     
         17 . The semiconductor processing chamber of  claim 16 , wherein the conductive sidewall is grounded.

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