High density second level interconnection for bumpless build up layer (bbul) packaging technology

Abstract

An apparatus including a die including a device side; and a build-up carrier including a body including a plurality of alternating layers of conductive material and dielectric material disposed on the device side of the die, an ultimate conductive layer patterned into a plurality of pads or lands; and a grid array including a plurality of conductive posts disposed on respective ones of the plurality of pads of the ultimate conductive layer of the body, at least one of the posts coupled to at least one of the contact points of the die through at least a portion of the conductive material of the body. A method including forming a body of a build-up carrier including a die, the body of the build-up carrier including an ultimate conductive layer and forming a grid array including a plurality of conductive posts on the ultimate conductive layer of the body.

1 . (canceled) 
     
     
         2 . An apparatus comprising:
 a die comprising a first side and an opposite second side comprising a device side with contact points;   a build-up carrier comprising:
 a body comprising a plurality of alternating layers of conductive material and dielectric material disposed on the second side of the die, an ultimate layer of conductive material disposed furthest from the die and patterned into a plurality of pads; 
 a grid array on a first side of the build-up carrier, the grid array comprising a plurality of posts each comprising a material that is the same as a material of the layers of conductive material of the body, the posts disposed on respective ones of the plurality of pads of the ultimate layer of conductive material of the body and extending through an ultimate layer of dielectric material defining a surface of the body, at least one of the posts coupled to at least one of the contact points of the die through at least a portion of the conductive material of the body; and 
 a plurality of contacts on a second side of the build-up carrier, the plurality of contacts coupled to one or more of the layers of conductive material, wherein the second side of the build-up carrier has a surface and the plurality of contacts are co-planar with the surface of the build-up carrier. 
   
     
     
         3 . The apparatus of  claim 2 , wherein each of the plurality of contacts comprises a first layer and a second layer, the first layer comprising a gold-nickel alloy, and the second layer comprising copper. 
     
     
         4 . The apparatus of  claim 2 , wherein the posts of the grid array comprise a height dimension of 50 microns to 100 microns. 
     
     
         5 . The apparatus of  claim 2 , wherein a dimension of the plurality of posts of the grid array is configurable. 
     
     
         6 . The apparatus of  claim 2 , wherein the body comprises a first side and a second side and the grid array is disposed on the first side of the body, the body further comprising a plurality of contact points on the first side and at least one of the plurality of posts of the grid array is coupled to at least one of the contact points of the body through at least a portion of the conductive material of the body. 
     
     
         7 . The apparatus of  claim 6 , wherein the die comprises a first die, the apparatus further comprising a second die coupled to the second side of the body, wherein at least one of the plurality of posts of the grid array is coupled to a contact point of the second die. 
     
     
         8 . The apparatus of  claim 2 , wherein each of the plurality of posts having a width dimension that is less than a width dimension of a respective pad. 
     
     
         9 . An apparatus comprising:
 a package comprising a microprocessor disposed in a carrier,   the microprocessor comprising a first side and an opposite second side comprising a device side with contact points;   the carrier comprising:
 a body comprising a plurality of alternating layers of conductive material and dielectric material disposed on the second side of the microprocessor, an ultimate layer of conductive material defining a plurality of pads; 
 a grid array on a first side of the body comprising a plurality of rectangular posts comprising a material that is the same as a material of the layers of conductive material of the body, the posts disposed on respective ones of the plurality of pads of the ultimate conductive layer of the body and extending through an ultimate layer of dielectric material defining a surface of the body, at least one of the posts coupled to at least one of the contact points of the die through at least a portion of the conductive material of the body; 
 a plurality of contacts on a second side of the carrier, the plurality of contacts coupled to one or more of the layers of conductive material, wherein the second side of the build-up carrier has a surface and the plurality of contacts are co-planar with the surface of the carrier; and 
   a printed circuit board coupled to at least a portion of the plurality of conductive posts of the grid array.   
     
     
         10 . The apparatus of  claim 9 , wherein each of the plurality of contacts comprises a first layer and a second layer, the first layer comprising a gold-nickel alloy, and the second layer comprising copper. 
     
     
         11 . The apparatus of  claim 9 , wherein the body comprises a first side and a second side and the grid array is disposed on the first side of the body, the body further comprising a plurality of contact points on the first side and at least one of the plurality of posts of the grid array is coupled to at least one of the contact points of the body through at least a portion of the conductive material of the body. 
     
     
         12 . The apparatus of  claim 11 , further comprising:
 a secondary device coupled to the at least one of the plurality of contacts on the first side of the body.   
     
     
         13 . The apparatus of  claim 12 , wherein the secondary device comprises at least one memory device. 
     
     
         14 . The apparatus of  claim 9 , wherein the posts of the grid array comprise a height dimension of 50 microns to 100 microns. 
     
     
         15 . The apparatus of  claim 9 , wherein each of the plurality of posts having a width dimension that is less than a width dimension of a respective pad. 
     
     
         16 . A method comprising:
 forming a body of a build-up carrier adjacent a device side of a die, the body of the build-up carrier comprising a plurality of alternating layers of conductive material and dielectric material wherein an ultimate conductive layer is patterned into a plurality of pads, wherein at least one of the layers of conductive material is coupled to a device of the die; and   forming a grid array comprising a plurality of conductive posts on respective ones of the plurality of pads of the ultimate conductive layer of the body.   
     
     
         17 . The method of  claim 16 , wherein forming a grid array comprises plating the plurality of posts to respective ones of the plurality of pads. 
     
     
         18 . The method of  claim 16 , prior to forming the grid array, the body comprises a surface comprising a dielectric layer on the plurality of pads of the ultimate conductive layer, and forming a grid array comprises:
 forming respective openings in the dielectric layer to the plurality of pads;   forming a conductive material layer on the surface of the body;   patterning a sacrificial layer on the conductive material layer, the sacrificial layer patterned to expose the conductive material layer on the plurality of pads; and   forming the plurality of posts on the conductive material layer.   
     
     
         19 . The method of  claim 18 , wherein forming the grid array comprises forming the conductive material layer by an electroless plating process and forming the posts by an electrolytic plating process. 
     
     
         20 . The method of  claim 18 , wherein a thickness and patterning of the sacrificial layer defines at least one dimension of the plurality of posts.