Integrated circuits with monolayer tmd channel and multilayer tmd source and drain

Abstract

Described herein are transistors with monolayer transition metal dichalcogenides (TMD) semiconductor material. TMD materials include combination of a transition metal (e.g., molybdenum or tungsten) and a chalcogen (e.g., sulfur or selenium) in a monolayer having a hexagonal crystal structure. A transistor has a single layer of TMD forming a channel region, and multiple layers of the TMD material at the source and drain regions. Upper portions of the multilayer TMD source and drain regions are doped, and conductive contacts are formed over the doped portions.

1 . A transistor device comprising:
 a transition metal dichalcogenide (TMD) over a support structure, the TMD having a central region, a first side region, and a second side region opposite the central region from the first side region, the first side region having a thickness in a direction perpendicular to the support structure at least twice a thickness of the central region; and   a dielectric material over the central region of the TMD, the dielectric material between the first side region of the TMD and the second side region of the TMD.   
     
     
         2 . The transistor device of  claim 1 , further comprising a metal over the dielectric material. 
     
     
         3 . The transistor device of  claim 1 , wherein the TMD has a lattice structure, and an upper portion of the TMD in the first side region has vacancies in the lattice structure. 
     
     
         4 . The transistor device of  claim 1 , wherein the TMD comprises a first transition metal, and an upper portion of the TMD in the first side region further comprises a second transition metal different from the first transition metal. 
     
     
         5 . The transistor device of  claim 1 , wherein the TMD comprises atoms of a transition metal and atoms of a chalcogen arranged in a lattice structure, and an upper portion of the TMD in the first side region comprises additional atoms of the transition metal or the chalcogen outside of the lattice structure. 
     
     
         6 . The transistor device of  claim 1 , further comprising a metal over the first side region of the TMD and the second side region of the TMD, the metal not over the central region. 
     
     
         7 . The transistor device of  claim 1 , further comprising a second dielectric material between the support structure and the TMD. 
     
     
         8 . The transistor device of  claim 1 , wherein the thickness of the central region of the TMD is less than 10 angstroms. 
     
     
         9 . The transistor device of  claim 8 , wherein the thickness of the first side region of the TMD is at least three times the thickness of the central region of the TMD. 
     
     
         10 . The transistor device of  claim 1 , wherein the central region of the TMD is a monolayer. 
     
     
         11 . The transistor device of  claim 1 , wherein the second side region has a thickness in the direction perpendicular to the support structure at least twice the thickness of the central region. 
     
     
         12 . A transistor device comprising:
 a source region comprising a transition metal dichalcogenide (TMD), wherein an uppermost portion of the TMD in the source region is doped;   a drain region comprising the TMD;   a channel region between the source region and the drain region, the channel region comprising the TMD.   
     
     
         13 . The transistor device of  claim 12 , wherein the source region comprises multiple layers of the TMD, and the channel region comprises a single layer of the TMD. 
     
     
         14 . The transistor device of  claim 13 , wherein the source region and the drain region comprise a same number of layers of the TMD. 
     
     
         15 . The transistor device of  claim 12 , further comprising a dielectric over the channel region, the dielectric between the source region and the drain region. 
     
     
         16 . The transistor device of  claim 12 , wherein the uppermost portion of the TMD in the source region is doped by vacancies in a lattice structure of the TMD. 
     
     
         17 . The transistor device of  claim 12 , wherein the TMD comprises a first transition metal, and the uppermost portion of the TMD in the source region is doped by a second transition metal different from the first transition metal. 
     
     
         18 . A method comprising:
 depositing multiple layers of a transition metal dichalcogenide (TMD);   patterning a portion of the multiple layers of the TMD;   etching the patterned portion of the multiple layers of the TMD to provide a region having a single layer of the TMD; and   depositing a dielectric material over the region having a single layer of the TMD.   
     
     
         19 . The method of  claim 18 , further comprising:
 doping an upper layer of the multiple layers of the TMD.   
     
     
         20 . The method of  claim 18 , wherein an atomic layer etch process is used to etch the patterned portion of the multiple layers of the TMD.