Process for forming refractory metal silicide layers of different thicknesses in an integrated circuit

Abstract

A method for forming reactive metal silicide layers at two spaced locations on a silicon substrate, which layers can be of different thicknesses and/or of different reactive metals is provided. A sililcon substrate has a silicon dioxide layer formed thereon followed by the formation of a polysilicon layer on the silicon dioxide layer, followed by forming a layer of refractory metal, e.g. titanium on the polysilicon. A non-reflecting material, e.g. titanium nitride is formed on the refractory metal. Conventional photoresist techniques are used to pattern the titanium nitride, the titanium and polysilicon, and the titanium is reacted with the contacted polysilicon to form a titanium silicide. The portion of silicon dioxide overlying the silicon substrate is then removed and the exposed substrate is ion implanted to form source/drain regions. A second layer of refractory metal, either titanium or some other refractory metal, is deposited over the source/drain region, and either over the titanium nitride, or over the first formed silicide by first removing the titanium nitride. The second layer of refractory metal is reacted with the substrate at the source/drain region to form a refractory metal silicide, after which the unreacted refractory metal is removed.

What is claimed is: 
     
       1. A process for forming an integrated circuit having refractory metal silicide layers at two spaced regions of a silicon substrate used to for an integrated circuit comprising the steps of: forming a layer of dielectric material on said silicon substrate;   forming a layer of polysilicon on said layer of dielectric material;   forming a layer of refractory metal on said polysilicon;   forming a layer of essentially non-reflecting material on said layer of refractory metal;   patterning said layers of polysilicon, said refractory metal and said non-reflecting material;   said patterned layer including exposed side walls of said polysilicon;   heating said integrated circuit to react the refractory metal with the patterned layer of polysilicon to form a refractory metal silicide at those locations whereat said refractory metal and said polysilicon are in contact;   said heating being performed after the formation of said layer of non-reflecting material;   subsequently forming a layer of dielectric material on the exposed side walls of said polysilicon;   removing a portion of said dielectric material overlying said substrate to expose a portion of the silicon substrate surface while maintaining said dielectric material on the side walls of the polysilicon;   forming a refractory metal silicide on the portion of the exposed silicon substrate whereat said dielectric material was removed.   
     
     
       2. The process as defined in claim 1 wherein the dielectric material formed on the substrate and on the exposed side walls of the polysilicon is silicon dioxide. 
     
     
       3. The process as defined in claim 2 wherein said refractory metal silicide on said substrate is formed from a second layer of refractory metal deposited over at least said substrate portion whereat said silicon dioxide was removed. 
     
     
       4. The process as defined in claim 3 wherein any unreacted refractory metal is removed after the step of 
     
     
       5. The process as defined in claim 4 wherein a silicide layer on the substrate is formed by first removing the non-reflecting material from the underlying silicide layers and depositing a layer of refractory metal over both the substrate and the formed silicide layers. 
     
     
       6. The process as defined in claim 5 wherein the material used for forming the silicide layer in the substrate is titanium. 
     
     
       7. The process as described in claim 2 further characterized by said non-reflecting material being titanium nitride. 
     
     
       8. The process as defined in claim 7 wherein the silicide layer formed on the substrate is formed by depositing a layer of refractory metal over the substrate and over the titanium nitride. 
     
     
       9. The process as described in claim 2 wherein at least one of the refractory metals deposited to form a silicide is titanium. 
     
     
       10. The process as described in claim 9 wherein both of the refractory metals deposited are titanium. 
     
     
       11. The process as defined in claim 2 wherein the refractory metal silicide which is formed on the exposed portion of the silicon substrate is formed by selective deposition of a refractory metal on exposed conducting materials including the exposed portion of the substrate. 
     
     
       12. The process as defined in claim 11 wherein said refractory metal which is selectively deposited on the exposed conducting materials is tungsten. 
     
     
       13. The process as defined in claim 2 wherein at least one recessed oxide region is formed on said substrate, and wherein a portion of at least one patterned layer of polysilicon is disposed on said recessed oxide. 
     
     
       14. A process for forming an integrated circuit having refractory metal silicide layers at two spaced regions of a silicon substrate one of which regions is a gate electrode and the other a source/drain region comprising the steps of: forming a layer of dielectric material on said silicon substrate;   forming a layer of polysilicon on said layer of dielectric material;   forming a layer of refractory metal on said polysilicon;   forming a layer of essentially non-reflecting material on said layer of refractory metal;   patterning said layers of polysilicon, said refractory metal and said non-reflecting material;   said patterned layer including a gate electrode of said polysilicon having exposed side walls;   heating said integrated circuit to react the refractory metal with the gate electrode of the patterned layer of polysilicon to form a refractory metal silicide at those locations whereat said refractory metal and said polysilicon are in contact;   said heating step being performed after the formation of said layer of non-reflecting material;   subsequently forming a layer of dielectric material on the exposed side walls of said polysilicon gate electrode;   removing a portion of said dielectric material overlying said substrate to expose a portion of the silicon substrate surface as a source/drain region while maintaining said dielectric material on the side walls of the polysilicon gate electrode;   forming a refractory metal silicide on the source/drain region of the exposed silicon substrate whereat said dielectric material was removed.   
     
     
       15. The process as defined in claim 14 wherein the dielectric material formed on the substrate and on the side walls of the gate electrode is silicon dioxide. 
     
     
       16. The process as defined in claim 15 wherein the refractory metal silicide is formed in the source/drain region by coating the substrate with the refractory metal, and heating the substrate to form a silicide in the source/drain region. 
     
     
       17. The process as defined in claim 16 wherein any unreacted refractory metal is removed after forming the source/drain silicide to thereby prevent shorting between the gate electrode and the source/drain region. 
     
     
       18. The process as described in claim 17 wherein both of the refractory metals deposited are titanium. 
     
     
       19. The process as defined in claim 17 wherein the material used for forming the silicide layer in the source/drain region is titanium. 
     
     
       20. The process as defined in claim 19 wherein the non-reflecting material is titanium nitride, and the silicide layer formed in the source/drain region is formed by depositing a layer of titanium over the substrate and over the titanium nitride and reacting the titanium with contacting silicon and titanium nitride. 
     
     
       21. The process as defined in claim 17 wherein a silicide layer in the source/drain region is formed by first removing the non-reflecting material from the underlying silicide layers and depositing a refractory metal over both the source/drain region and the formed silicide layers. 
     
     
       22. The process as defined in claim 15 wherein at least one recessed oxide region is formed on said substrate, and wherein a portion of the polysilicon forming the gate electrode is disposed on said recessed oxide. 
     
     
       23. The process as defined in claim 15 wherein the refractory metal silicide which is formed on the exposed portion of the silicon substrate is formed by selective deposition of a refractory metal on exposed conducting materials including the exposed portion of the substrate. 
     
     
       24. The process as defined in claim 23 wherein said refractory metal which is selectively deposited on the exposed conducting materials is tungsten.