US5904542AExpiredUtility

Performing a semiconductor fabrication sequence within a common chamber and without opening the chamber beginning with forming a field dielectric and concluding with a gate dielectric

Assignee: ADVANCED MICRO DEVICES INCPriority: Mar 26, 1997Filed: Mar 26, 1997Granted: May 18, 1999
Est. expiryMar 26, 2017(expired)· nominal 20-yr term from priority
H10W 10/13H10W 10/012Y10S438/913
38
PatentIndex Score
7
Cited by
16
References
15
Claims

Abstract

An in situ process is provided for isolating semiconductor devices according to a LOCOS process. The invention contemplates performing field oxide growth, nitride layer removal, sacrificial oxide growth and removal, and gate oxide growth all within a single chamber without removing the wafers from the chamber during processing. The invention is believed to result in increased yields and process throughput by reducing the exposure of the wafers to outer-chamber contaminants, thermal stress, and transportation damage, as well as reducing inter-chamber transportation time. The invention also contemplates an in situ processing chamber adapted for performing field oxide growth, nitride layer removal, sacrificial oxide growth and removal, and gate oxide growth as part of a LOCOS isolation process. The in situ processing chamber is adapted for thermal oxidation and etching processes to implement the LOCOS isolation structure. A conventional oxidation furnace may be adapted to provide the in situ processing chamber by adapting the oxidation furnace to accept etchant gasses. Other conventional chambers or a specialized chamber may also be adapted according to the present invention for the in situ LOCOS process.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
       1. A method for forming an integrated circuit, comprising: providing a semiconductor substrate having a pad oxide layer and a substantially oxygen impermeable layer patterned on said semiconductor substrate to define active regions and field regions of said semiconductor substrate;   within a common chamber and without opening the chamber, performing the steps of: growing a field oxide substantially in said field regions;   removing the substantially oxygen impermeable layer;   growing a sacrificial oxide layer in said active regions; and   removing said sacrificial oxide layer to provide a substantially defect free surface at said active regions.     
     
     
       2. The method as recited in claim 1, further comprising: growing a gate oxide in said active regions after said removing said sacrificial oxide layer, wherein said growing a gate oxide is performed in the common chamber without opening the common chamber.   
     
     
       3. The method as recited in claim 1, wherein said growing a field oxide comprises supplying thermal energy to said semiconductor substrate in an oxidizing ambient. 
     
     
       4. The method as recited in claim 1, wherein said growing a field oxide results in Kooi ribbon forming below said pad oxide near said active regions' borders. 
     
     
       5. The method as recited in claim 1, wherein said removing the substantially oxygen impermeable layer comprises subjecting the substantially oxygen impermeable layer to an etchant. 
     
     
       6. The method as recited in claim 5, wherein said etchant comprises an acid diluted in an inert gas. 
     
     
       7. The method as recited in claim 5, wherein said etchant comprises NF 3  or ClF 3  diluted in nitrogen or argon. 
     
     
       8. The method as recited in claim 1, further comprising: removing said pad oxide layer prior to said growing a sacrificial oxide, wherein said removing said pad oxide layer is performed in the common chamber without opening the common chamber.     
     
     
       9. The method as recited in claim 1, wherein said growing a sacrificial oxide layer comprises growing said pad oxide layer into said semiconductor substrate. 
     
     
       10. The method as recited in claim 4, wherein the sacrificial oxide layer is grown to a depth within said semiconductor substrate below said Kooi ribbon. 
     
     
       11. The method as recited in claim 4, wherein said removing a sacrificial oxide layer results in the removal of said Kooi ribbon. 
     
     
       12. The method as recited in claim 1, wherein said removing said sacrificial oxide layer comprises subjecting said sacrificial oxide layer to an etchant. 
     
     
       13. The method as recited in claim 12, wherein said etchant comprises an acid diluted in an inert gas. 
     
     
       14. The method as recited in claim 12, wherein said etchant comprises NF 3  or ClF 3  diluted in nitrogen or argon. 
     
     
       15. The method as recited in claim 1, wherein the semiconductor substrate remains within the chamber throughout said growing a field oxide, said removing the oxygen impermeable layer, said growing a sacrificial oxide layer, and said removing said sacrificial oxide layer.

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