US6252305B1ExpiredUtility

Multichip module having a stacked chip arrangement

96
Assignee: ADVANCED SEMICONDUCTOR ENGPriority: Feb 29, 2000Filed: Feb 29, 2000Granted: Jun 26, 2001
Est. expiryFeb 29, 2020(expired)· nominal 20-yr term from priority
H10W 90/754H10W 90/734H10W 90/732H10W 90/231H10W 90/24H10W 90/20H10W 72/884H10W 90/00
96
PatentIndex Score
137
Cited by
8
References
2
Claims

Abstract

A multichip module comprises at least two semiconductor chips wherein each has a row of bonding pads formed on the active surface thereof and disposed along one side edge thereof. The semiconductor chips are mounted to a substrate in a stacking arrangement wherein the upper chip is attached to the active surface of the lower chip in a manner that no portion of the upper chip interferes with a vertical line of sight of each bond pad of the lower chip to permit wire bonding thereof. Therefore, all semiconductor chips can be wire bonded simultaneously after stacking the chips on the substrate. This allows wire bonding of all chips to be completed in a single step so as to increase UPH (unit per hour), thereby reducing cost for manufacturing the MCM.

Claims

exact text as granted — not AI-modified
What is claimed is:  
     
       1. A multichip module comprising: 
       a substrate having a structure for making external electrical connection;  
       first, second, third and fourth semiconductor chips each consisting essentially of a single row of bonding pads formed on an active surface thereof and disposed on a side portion thereof, wherein  
       said first chip being attached to the substrate;  
       said second chip being attached to the active surface of the first chip such that the two respective rows of bonding pads on the first and second chips are substantially parallel and opposing to each other, and the side portion of the second chip having bonding pads formed thereon projects from the first chip;  
       said third chip being attached to the active surface of the second chip such that the row of bonding pads on the third chip is substantially perpendicular to the two rows of bonding pads on the first and second chips;  
       said fourth chip being attached to the active surface of the third chip such that the two rows of bonding pads on the third and fourth chips are substantially parallel and opposing to each other, and the side portion of the fourth chip having bonding pads formed thereon projects from the third chip; and  
       said third and fourth chips each have a width smaller than a perpendicular distance separating the two rows of bonding pads on the first and second chips; and  
       a plurality of bonding wires electrically connecting the bonding pads of each chip to the structure for making external electrical connection.  
     
     
       2. A multichip module comprising: 
       a substrate having a structure for making external electrical connection;  
       first, second, third and fourth semiconductor chips each consisting essentially of a single row of bonding pads formed on an active surface thereof and disposed on a side portion thereof, wherein  
       said first chip being attached to the substrate;  
       said second chip being attached to the active surface of the first chip such that the row of bonding pads on the second chip is substantially perpendicular to the row of bonding pads on the first chip, and the side portion of the second chip having bonding pads formed thereon projects from the first chip;  
       said third chip being attached to the active surface of the second chip such that the row of bonding pads on the third chip is substantially perpendicular to the row of bonding pads on the second chip, and the side portion of the third chip having bonding pads formed thereon projects from the second chip;  
       said fourth chip being attached to the active surface of the third chip such that the row of bonding pads on the fourth chip is substantially perpendicular to the row of bonding pads on the third chip, and the side portion of the fourth chip having bonding pads formed thereon projects from the third chip; and  
       the second and fourth chips each having a width smaller than a perpendicular distance separating the two respective rows of bonding pads on the first and third chips; and  
       a plurality of bonding wires electrically connecting the bonding pads of each chips to the structure for making external electrical connection.

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