Dual work function CMOS gate technology based on metal interdiffusion

Abstract

A gate structure for a MOSFET device comprises a gate insulation layer, a first layer of a first metal abutting the gate insulation layer, and a second layer overlying the first layer and comprising a mixture of the metal of the first layer and a second metal, the metal layers formed by the diffusion of the first metal into and through the second metal. The second metal can be used as the gate for a n-MOS transistor, and the mixture of first metal and second metal overlying a layer of the first metal can be used as a gate for a p-MOS transistor where the first metal has a work function of about 5.2 eV and the second metal has a work function of about 4.1 eV.

1. A CMOS transistor pair comprising
 a) a first MOS transistor of one conductivity type having a source and a drain separated by a channel and a first gate over the channel and separated therefrom by an insulator, the first gate comprising a titanium layer abutting the insulator and having a first work function, and 
 b) a second MOS transistor of second conductivity type having a source and a drain separated by a channel and a second gate over the channel and separated therefrom by an insulator, the second gate comprising a mixture of titanium and nickel and a layer of nickel, the layer of nickel abutting the insulator and having a work function different from the first work function. 
 
   
   
     2. The CMOS transistor pair as defined by  claim 1  wherein the work function of the titanium layer is on the order 4.1 eV and the work function of the nickel layer is on the order of 5.2 eV. 
   
   
     3. The CMOS transistor pair as defined by  claim 1  wherein the first MOS transistor is an n-MOS transistor and the second MOS transistor is a p-MOS transistor. 
   
   
     4. The CMOS transistor pair as defined by  claim 1  wherein the thickness of the titanium layer is on the order of 5–20 nm and the thickness of the nickel layer is in the order of 20–100 nm. 
   
   
     5. The CMOS transistor pair as defined by  claim 4  wherein the CMOS transistor pair is formed in a silicon substrate and the insulator comprises silicon oxide. 
   
   
     6. The CMOS transistor pair as defined by  claim 5  wherein the work function of the titanium is on the order of 4.1 eV and the work function of the nickel is on the order of 5.2 eV.