Semiconductor package with lead frame as chip carrier and method for fabricating the same

Abstract

A semiconductor package with a lead frame as a chip carrier and a method for fabricating the same are provided. The lead frame includes a die pad and a plurality of leads properly spaced apart from the die pad, each lead being composed of an inner lead portion and an outer lead portion, wherein the inner lead portion is directed toward the die pad, and the outer lead portion has a terminal. At least a chip is mounted on the die pad, and a first encapsulant is formed for encapsulating the chip, die pad and inner lead portions. An injection-molded second encapsulant is formed for encapsulating the first encapsulant and outer lead portions, but exposing the terminals of the outer lead portions. The second encapsulant made by injection molding can prevent resin flash over the exposed terminals, thereby assuring electrical-connection quality of the semiconductor package.

1. A semiconductor package with a lead frame as a chip carrier, comprising:
 a lead frame having a die pad and a plurality of leads spaced apart from the die pad by a predetermined distance, each of the leads being composed of an inner lead portion and an outer lead portion integral with the inner lead portion, wherein the leads are all disposed on one side of the lead frame; 
 at least a chip mounted on a surface of the die pad and electrically connected to the inner lead portions; 
 a first encapsulant formed on the lead frame for encapsulating bottom portions of the chip, the die pad, and the inner lead portions and for allowing the outer lead portions to outwardly protrude from the first encapsulant; and 
 an injection-molded second encapsulant made of a thermoplastic resin material for covering the first encapsulant and the outer lead portions protruded from the first encapsulant, allowing a surface of each of the terminals of the outer lead portions and a surface of the first encapsulant to be exposed to outside of the second encapsulant and level with a surface of the second encapsulant, whereby the injection-molded second encapsulant prevents resin flash over the exposed terminals that may be electrically connected to an external device, thereby assuring quality of the electrical connection with the external device. 
 
   
   
     2. The semiconductor package of  claim 1 , wherein the chip is electrically connected to the inner lead portions by a plurality of bonding wires. 
   
   
     3. The semiconductor package of  claim 2 , wherein the bonding wires are gold wires. 
   
   
     4. The semiconductor package of  claim 1 , wherein the terminals of the outer lead portions are positioned by a height difference with respect to the conesponding inner lead portions. 
   
   
     5. The semiconductor package of  claim 1 , wherein the thermoplastic resin material is selected from the group consisting of polycarbonate ester, acrylic resin, methylene chloride, and polyester. 
   
   
     6. The semiconductor package of  claim 1 , wherein a surface of the die pad opposed to the surface mounted with the chip is exposed to outside of the first and second encapsulants. 
   
   
     7. A method for fabricating a semiconductor package with a lead frame as a chip carrier, comprising the steps of:
 preparing a lead frame having a die pad and a plurality of leads spaced apart from the die pad by a predetermined distance, each of the leads being composed of an inner lead portion and an outer lead portion integral with the inner lead portion, wherein the leads are all disposed on one side of the lead frame; 
 mounting at least a chip on a surface of the die pad, and electrically connecting the chip to the inner lead portions; 
 performing a molding process to form a first encapsulant on the lead frame for encapsulating bottom portions of the chip, the die pad, and the inner lead portions and for allowing the outer lead portions to outwardly protrude from the first encapsulant; and 
 performing an injection molding process to form a second encapsulant for covering the first encapsulant and the outer lead portions protruded from the first encapsulant, allowing a surface of each of the terminals of the outer lead portions and a surface of the first encapsulant to be exposed to outside of the second encapsulant and level with a surface of the second encapsulant, whereby the second encapsulant made by injection molding prevents resin flash over the exposed terminals that may be electrically connected to an external device, thereby assuring quality of the electrical connection with the external device. 
 
   
   
     8. The method of  claim 7 , wherein the chip is electrically connected to the inner lead portions by a plurality of bonding wires. 
   
   
     9. The method of  claim 8 , wherein the bonding wires are gold wires. 
   
   
     10. The method of  claim 7 , wherein the terminals of the outer lead portions are positioned by a height difference with respect to the corresponding inner lead portions. 
   
   
     11. The method of  claim 7 , wherein the second encapsulant is made of a thermoplastic resin material. 
   
   
     12. The method of  claim 11 , wherein the thermoplastic resin material is selected from the group consisting of polycarbonate ester, acrylic resin, methylene chloride, and polyester. 
   
   
     13. The method of  claim 7 , wherein a surface of the die pad opposed to the surface mounted with the chip is exposed to outside of the first and second encapsulants.