Metal core foldover package structures

Abstract

Chip-scale packages and assemblies thereof and methods of fabricating such packages including Chip-On-Board, Board-On-Chip, and vertically stacked Package-On-Package modules are disclosed. The chip-scale package includes a core member of a metal or alloy having a recess for at least partially receiving a die therein and includes at least one flange member partially folded over another portion of the core member. Conductive traces extend from one side of the package over the at least one flange member to an opposing side of the package. Systems including the chip-scale packages and assemblies are also disclosed.

1. An interposer substrate comprising:
 a thermally and electrically conductive core member comprising: 
 a die recess configured to at least partially receive a semiconductor die therein; and at least one flange member including a first, proximal segment extending laterally away from the die recess to a second, intermediate segment and a third, distal segment extending laterally toward the die recess from the second, intermediate segment; 
 a dielectric layer disposed over at least a portion of the core member on a surface thereof opposite a location of the die recess and extending from proximate the die recess over the at least one flange member to the third, distal segment thereof; and 
 a plurality of conductive traces disposed over the dielectric layer and extending from proximate the die recess over the at least one flange member to the third, distal segment thereof 
 
     
     
       2. The interposer substrate of  claim 1 , wherein the core member comprises a metal or metal alloy. 
     
     
       3. The interposer substrate of  claim 2 , wherein the metal or metal alloy comprises copper, aluminum, an aluminum alloy or an iron-nickel alloy. 
     
     
       4. The interposer substrate of  claim 1 , wherein the die recess of the core member resides in a portion thereof of a first thickness and the at least one flange member is of a second, lesser thickness. 
     
     
       5. The interposer substrate of  claim 4 , wherein a surface of the at least one flange member is coextensive with a surface of the portion of the core member in which the die recess resides. 
     
     
       6. The interposer substrate of  claim 1 , wherein the die recess is configured to receive a semiconductor die entirely therein. 
     
     
       7. The interposer substrate of  claim 1  further comprising:
 a plurality of discrete conductive elements disposed on conductive traces of the plurality of conductive traces proximate the die recess and over the first, proximal segment of the at least one flange member. 
 
     
     
       8. The interposer substrate of  claim 7 , wherein at least some conductive traces of the plurality of conductive traces extend between at least one discrete conductive element of the plurality of discrete conductive elements and the third, distal segment of the at least one flange member. 
     
     
       9. The interposer substrate of  claim 1 , further comprising at least one aperture extending through the core member between the die recess and an exterior surface of the core member. 
     
     
       10. The interposer substrate of  claim 9 , wherein the at least one aperture is sized and configured to expose a plurality of bond pads of a semiconductor die at least partially received in the die recess with an active surface of the semiconductor die facing a floor of the die recess. 
     
     
       11. The interposer substrate of  claim 1 , wherein the core member consists of a single structure. 
     
     
       12. The interposer substrate of  claim 1 , wherein the die recess extends partially through the core member from one surface thereof 
     
     
       13. The interposer substrate of  claim 1 , wherein the die recess extends through the core member from one surface thereof to another, opposing surface thereof 
     
     
       14. The interposer substrate of  claim 1 , wherein the second, intermediate segment of the at least one flange member comprises an arcuate segment extending between the first, proximal segment and the third, distal segment of the at least one flange member. 
     
     
       15. The interposer substrate of  claim 1 , wherein the third, distal segment of the at least one flange member extends over a portion of the core member in which the die recess resides. 
     
     
       16. The interposer substrate of  claim 15 , wherein the third, distal segment is secured to the portion of the core member in which the die recess resides. 
     
     
       17. The interposer substrate of  claim 15 , wherein the at least one flange member and the portion of the core member in which the die resides define a void therebetween. 
     
     
       18. The interposer substrate of  claim 1 , wherein the at least one flange member comprises two flange members extending on opposing sides of a portion of the core member in which the die recess resides. 
     
     
       19. The interposer substrate of  claim 18 , wherein the portion of the core member in which the die recess resides is of greater thickness than a thickness of the two flange members. 
     
     
       20. The interposer substrate of  claim 1 , further comprising at least one conductive via extending between a conductive trace of the plurality and the die recess. 
     
     
       21. The interposer substrate of  claim 1 , further comprising a plurality of discrete conductive elements disposed on conductive traces of the plurality of conductive traces over the third, distal segment of the at least one flange member. 
     
     
       22. The interposer substrate of  claim 1 , further comprising a layer of anisotropic conductive material disposed on conductive traces of the plurality of conductive traces over the third, distal segment of the at least one flange member. 
     
     
       23. A semiconductor device assembly comprising:
 an interposer substrate, comprising: 
 a thermally and electrically conductive core member comprising: 
 a die recess configured to at least partially receive a semiconductor die therein; and 
 at least one flange member including a first, proximal segment extending laterally away from the die recess to a second, intermediate segment and a third, distal segment extending laterally toward the die recess from the second, intermediate segment; 
 a dielectric layer disposed over at least a portion of the core member on a surface thereof opposite a location of the die recess and extending from proximate the die recess over the at least one flange member to the third, distal segment thereof; and 
 a plurality of conductive traces disposed over the dielectric layer and extending from proximate the die recess over the at least one flange member to the third, distal segment thereof; 
 a semiconductor die having an active surface bearing a plurality of bond pads disposed with at least a portion thereof received in the die recess; and 
 a plurality of conductive elements connecting bond pads of the semiconductor die and conductive traces. 
 
     
     
       24. The semiconductor device assembly of  claim 23 , wherein the core member comprises a metal or metal alloy. 
     
     
       25. The semiconductor device assembly of  claim 24 , wherein the metal or metal alloy comprises copper, aluminum, an aluminum alloy or an iron-nickel alloy. 
     
     
       26. The semiconductor device assembly of  claim 23 , wherein the die recess of the core member resides in a portion thereof of a first thickness and the at least one flange member is of a second, lesser thickness. 
     
     
       27. The semiconductor device assembly of  claim 26 , wherein a surface of the at least one flange member is coextensive with a surface of the portion of the core member in which the die recess resides. 
     
     
       28. The semiconductor device assembly of  claim 23 , wherein the semiconductor die is substantially completely received within the die recess. 
     
     
       29. The semiconductor device assembly of  claim 23 , further comprising:
 a plurality of discrete conductive elements disposed on conductive traces of the plurality of conductive traces proximate the die recess and over the first, proximal segment of the at least one flange member. 
 
     
     
       30. The semiconductor device assembly of  claim 29 , wherein at least some conductive traces of the plurality of conductive traces extend between at least one discrete conductive element of the plurality of discrete conductive elements and the third, distal segment of the at least one flange member. 
     
     
       31. The semiconductor device assembly of  claim 23 , further comprising at least one aperture extending through the core member between the die recess and an exterior surface of the core member. 
     
     
       32. The semiconductor device assembly of  claim 31 , wherein the die recess extends partially though the core member from one surface thereof, the semiconductor die is received in the die recess with the active surface thereof facing a floor of the die recess through which the at least one aperture extends, and the at least one aperture is sized and configured to expose the plurality of bond pads of the semiconductor die. 
     
     
       33. The semiconductor device assembly of  claim 32 , wherein the plurality of conductive elements extends through the at least one aperture. 
     
     
       34. The semiconductor device assembly of  claim 33 , wherein the plurality of conductive elements comprises wire bonds. 
     
     
       35. The semiconductor device assembly of  claim 34 , further comprising a mass of dielectric material filling the at least one aperture and covering the xvire bonds. 
     
     
       36. The semiconductor device assembly of  claim 23 , wherein the core member consists of a single structure. 
     
     
       37. The semiconductor device assembly of  claim 23 , wherein the die recess extends through the core member from one surface thereof to another, opposing surface thereof and the semiconductor die is received in the die recess with the active surface thereof facing away from ends of the plurality of conductive traces proximate at least one aperture. 
     
     
       38. The semiconductor device assembly of  claim 37 , wherein the plurality of conductive elements extends to a side of the plurality of conductive traces Facing the semiconductor die. 
     
     
       39. The semiconductor device assembly of  claim 38 , wherein the plurality of conductive elements comprises wire bonds. 
     
     
       40. The semiconductor device assembly of  claim 23 , wherein the second, intermediate segment of the at least one flange member comprises an arcuate segment extending between the first, proximal segment and the third, distal segment of the at least one flange member. 
     
     
       41. The semiconductor device assembly of  claim 23 , wherein the third, distal segment of the at least one flange member extends over a portion of the core member in which the die recess resides. 
     
     
       42. The semiconductor device assembly of  claim 41 , wherein the third, distal segment is secured to the portion of the core member in which the die recess resides. 
     
     
       43. The semiconductor device assembly of  claim 41 , wherein the at least one flange member and the portion of the core member in which the die recess resides define a void therebetween. 
     
     
       44. The semiconductor device assembly of  claim 23 , wherein the at least one flange member comprises two flange members extending on opposing sides of a portion of the core member in which the die recess resides. 
     
     
       45. The semiconductor device assembly of  claim 44 , wherein the portion of the core member in which the die recess resides is of greater thickness than a thickness of the two flange members. 
     
     
       46. The semiconductor device assembly of  claim 23 , further comprising at least one conductive via extending between a conductive trace of the plurality and the die recess and the conductive trace of the plurality is connected to the semiconductor die through the at least one conductive trace. 
     
     
       47. The semiconductor device assembly of claim.  23 , further comprising a plurality of discrete conductive elements disposed on conductive traces of the plurality of conductive traces over the third, distal segment of the at least one flange member. 
     
     
       48. The semiconductor device assembly of  claim 23 , further comprising a layer of anisotropic conductive material disposed on conductive traces of the plurality of conductive traces over the third, distal segment of the at least one flange member. 
     
     
       49. The semiconductor device assembly of  claim 23 , wherein at least one interior surface defining the die recess and on which the semiconductor die resides is covered with a layer of dielectric material. 
     
     
       50. The semiconductor device assembly of  claim 23 , wherein the die recess is filled around the semiconductor die with a dielectric material at least to a level to cover a portion of sides thereof 
     
     
       51. The semiconductor device assembly of  claim 23 , wherein the die recess is of sufficient depth to entirely receive the semiconductor die therein, and the die recess is filled with a dielectric material to a level sufficient to cover sides of the semiconductor die and extend completely thereover. 
     
     
       52. An electronic system, comprising:
 a processor; and 
 memory; 
 wherein at least one of the processor and the memory comprises a semiconductor die assembly, including: 
 an interposer substrate, comprising: 
 a thermally and electrically conductive core member comprising: 
 a die recess configured to at least partially receive a semiconductor die therein; and 
 at least one flange member including a first, proximal segment extending laterally away from the die recess to a second, intermediate segment and a third, distal segment extending laterally toward the die recess from the second, intermediate segment; 
 a dielectric layer disposed over at least a portion of the core member on a surface thereof opposite a location of the die recess and extending from proximate the die recess over the at least one flange member to the third, distal segment thereof; and 
 a plurality of conductive traces disposed over the dielectric layer and extending from proximate the die recess over the at least one flange member to the third, distal segment thereof; 
 a semiconductor die having an active surface bearing a plurality of bond pads disposed with at least a portion thereof received in the die recess; and 
 a plurality of conductive elements connecting bond pads of the semiconductor die and conductive traces. 
 
     
     
       53. The electronic system of  claim 52 , further comprising an input device and an output device.