P
US8049300B2ExpiredUtilityPatentIndex 48

Inductor energy loss reduction techniques

Assignee: TAIWAN SEMICONDUCTOR MFGPriority: Sep 24, 2004Filed: Jun 25, 2007Granted: Nov 1, 2011
Est. expirySep 24, 2024(expired)· nominal 20-yr term from priority
Inventors:YEH ANDREWCHANG ALEXTSENG SUNG-PICHANG CHANG-YUNCHEN HAO-YUYANG FU-LIANG
H10W 10/031H10W 10/30H10W 10/011H10W 10/10H10D 88/00H10D 84/00H01F 17/0006H01F 2017/008
48
PatentIndex Score
1
Cited by
18
References
12
Claims

Abstract

An inductive device including an inductor coil located over a substrate, at least one electrically insulating layer interposing the inductor coil and the substrate, and a plurality of current interrupters each extending into the substrate, wherein a first aggregate outer boundary of the plurality of current interrupters substantially encompasses a second aggregate outer boundary of the inductor coil.

Claims

exact text as granted — not AI-modified
1. An integrated circuit device, comprising:
 a plurality of microelectronic devices each located at least partially in a substrate; 
 a plurality of current interrupters each extending into the substrate, the plurality of current interrupters having a first aggregate outer boundary exclusive of ones of the plurality of microelectronic devices; and 
 an interconnect structure located over the plurality of microelectronic devices and the plurality of current interrupters and including:
 interconnects interconnecting ones of the plurality of microelectronic devices; and 
 an inductor coil having a second aggregate outer boundary substantially encompassed by the first aggregate outer boundary of the plurality of current interrupters. 
 
 
     
     
       2. The integrated circuit device of  claim 1  wherein at least one of the interconnects is electrically connected to the inductor coil. 
     
     
       3. The integrated circuit device of  claim 1  wherein the plurality of current interrupters each substantially comprise an electrically insulating material. 
     
     
       4. The integrated circuit device of  claim 1  wherein the plurality of current interrupters each substantially comprise an electrically conductive material. 
     
     
       5. The integrated circuit device of  claim 1  wherein the plurality of current interrupters each comprise a conductive portion substantially surrounded by an electrically insulating material. 
     
     
       6. The integrated circuit device of  claim 1  wherein each of the plurality of current interrupters has a substantially circular cross-section. 
     
     
       7. The integrated circuit device of  claim 1  wherein each of the plurality of current interrupters has a length about equal to a width thereof. 
     
     
       8. The integrated circuit device of  claim 1  wherein ones of the plurality of current interrupters form elongated electrically insulating regions in the substrate. 
     
     
       9. The integrated circuit device of  claim 1  wherein the plurality of current interrupters has a radial spoke configuration. 
     
     
       10. The integrated circuit device of  claim 1  wherein the substrate is a doped substrate and comprises a plurality of doped regions each interposing a pair of the plurality of current interrupters and forming a dopant junction with the doped substrate. 
     
     
       11. The integrated circuit device of  claim 10  wherein the plurality of doped regions includes a plurality of first doped regions each having a first dopant type and a plurality of second doped regions each having a second dopant type. 
     
     
       12. The integrated circuit device of  claim 1  wherein ones of the plurality of current interrupters are oriented substantially perpendicular to an eddy current established by current flowing through the inductor coil.

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