Adhesion between post-passivation interconnect structure and polymer

Abstract

An embodiment integrated circuit structure includes a substrate, a metal pad over the substrate, a post-passivation interconnect (PPI) structure over the substrate and electronically connected to the metal pad, a thin oxide film layer directly over a top surface of the PPI structure, and a polymer layer over the thin oxide film layer and PPI structure.

What is claimed is: 
     
       1. An integrated circuit structure comprising:
 a substrate; 
 a metal pad over the substrate; 
 a passivation layer over the substrate and covering an edge portion of the metal pad; 
 a post-passivation interconnect (PPI) structure over the passivation layer and electronically connected to the metal pad; 
 a thin oxide film layer directly over a top surface of the PPI structure; and 
 a polymer layer over the thin oxide film layer and PPI structure. 
 
     
     
       2. The integrated circuit structure of  claim 1 , wherein the thin oxide film layer has a thickness greater than about ten nanometers. 
     
     
       3. The integrated circuit structure of  claim 1 , wherein the thin oxide film layer has a thickness less than about two hundred nanometers. 
     
     
       4. The integrated circuit structure of  claim 1 , wherein the polymer layer has a thickness of about five to ten micrometers. 
     
     
       5. The integrated circuit structure of  claim 1 , wherein the PPI structure comprises copper, and the thin oxide film layer comprises copper oxide. 
     
     
       6. The integrated circuit structure of  claim 1 , wherein the polymer layer is selected from a group consisting of polyimide (PI), polybenzoxazole (PBO), benzocyclobuten (BCB), epoxy, silicone, acrylates, nano-filled pheno resin, siloxane, fluorinated polymer, polynorbornene, and combinations thereof. 
     
     
       7. The integrated circuit structure of  claim 1 , further comprising:
 an under bump metallurgy (UBM) extending into an opening in the polymer layer and the thin oxide film layer, wherein the UBM is electrically connected to the PPI structure; and 
 a bond ball on the UBM. 
 
     
     
       8. An integrated circuit structure comprising:
 a first die, wherein the first die comprises:
 a metal pad at a top surface of the first die; and 
 a passivation layer covering an edge portion of the metal pad; 
 
 a redistribution layer (RDL) structure over the first die, wherein the RDL structure is electrically connected to the metal pad; 
 a thin oxide film layer over a top surface of the RDL structure; 
 a polymer layer over the thin oxide film layer and the RDL structure; 
 an under bump metallurgy (UBM) over the polymer layer and electrically connected the RDL structure; and 
 a conductive bump on the UBM. 
 
     
     
       9. The integrated circuit structure of  claim 8 , wherein the thin oxide film layer has a thickness greater than about ten nanometers. 
     
     
       10. The integrated circuit structure of  claim 8 , wherein the polymer layer is selected from a group consisting of polyimide (PI), polybenzoxazole (PBO), benzocyclobuten (BCB), epoxy, silicone, acrylates, nano-filled pheno resin, siloxane, fluorinated polymer, polynorbornene, and combinations thereof. 
     
     
       11. The integrated circuit structure of  claim 8 , wherein the RDL structure comprises a metallic material, and the thin oxide film layer comprises an oxide of the metallic material. 
     
     
       12. The integrated circuit structure of  claim 8 , further comprising a molding compound separating the first die from a second die in the integrated circuit structure. 
     
     
       13. The integrated circuit of  claim 8 , wherein the RDL structure comprises one or more RDL lines and RDL pads. 
     
     
       14. A method for forming an integrated circuit structure comprising:
 forming a post-passivation interconnect (PPI) structure over a substrate, wherein the substrate comprises a metal pad and the PPI structure is electrically connected to the metal pad; 
 oxidizing a top surface of the PPI structure; and 
 forming a polymer layer over the PPI structure. 
 
     
     
       15. The method of  claim 14 , wherein oxidizing a top surface of the PPI structure comprises an oxygen plasma treatment. 
     
     
       16. The method of  claim 14 , wherein the oxygen plasma treatment comprises:
 exposing the top surface of the PPI structure to an oxygen plasma, wherein the oxygen plasma is created by exciting oxygen gas over the PPI structure; and 
 applying a voltage under the substrate. 
 
     
     
       17. The method of  claim 14 , wherein oxidizing a top surface of the PPI structure comprises treating the substrate with a wet chemical. 
     
     
       18. The method of  claim 14 , wherein the oxidizing a top surface of the PPI structure creates a thin oxide film layer having a thickness greater than about ten nanometers. 
     
     
       19. The method of  claim 18 , further comprising:
 patterning an opening in the polymer layer and the thin oxide film layer, wherein the opening exposes a portion of the PPI structure; 
 forming an under bump metallurgy (UMB), wherein at least a portion of the UMB extends into the opening in the polymer layer and the thin oxide film layer and is electrically connected to the PPI structure; and 
 forming a bond ball on the UMB. 
 
     
     
       20. The method of  claim 18 , wherein the PPI structure comprises copper, the thin oxide film layer comprises copper oxide, and the polymer layer is selected from a group consisting of polyimide (PI), polybenzoxazole (PBO), benzocyclobuten (BCB), epoxy, silicone, acrylates, nano-filled pheno resin, siloxane, fluorinated polymer, polynorbornene, and combinations thereof.