Fin field effect transistor device and fabrication method thereof

Abstract

A field effect transistor (FinFET) device includes a substrate, a fin structure, a shallow trench isolation and a gate structure. The fin structure is formed on a surface of the substrate and includes a base fin structure and an epitaxial fin structure formed on the base fin structure. The shallow trench isolation structure is formed on the surface of the substrate and includes a peripheral zone and a concave zone. The peripheral zone physically contacts with the fin structure. The gate structure is disposed on the epitaxial fin structure perpendicularly. A method of fabricating the aforementioned field effect transistor is also provided.

What is claimed is: 
     
       1. A method of fabricating a fin field effect transistor device, comprising:
 providing a substrate having a fin structure on a surface of the substrate; 
 forming at least a shallow trench isolation structure on the surface of the substrate; 
 forming a base fin structure with the shallow trench isolation structure concurrently, wherein the shallow trench isolation structure comprises a peripheral zone and a concave zone, and the peripheral zone physically contacts with the fin structure; 
 forming a pair of spacers on a portion of a surface of the shallow trench isolation structure on two sides of a portion of the fin structure, respectively; 
 forming an epitaxial fin structure on a top surface of the base fin structure; 
 forming a gate structure on the epitaxial fin structure, wherein an extending direction of the gate structure is perpendicular to an extending direction of the epitaxial fin structure; 
 partially removing a portion of the epitaxial fin structure not covered by the gate structure to form a removed area; and 
 epitaxially growing a source/drain structure in the removed area, wherein a composition of the source/drain structure is different from that of the epitaxial fin structure. 
 
     
     
       2. The method of fabricating a fin field effect transistor device according to  claim 1 , wherein a top surface of the peripheral zone is higher than a top surface of the concave zone. 
     
     
       3. The method of fabricating a fin field effect transistor device according to  claim 2 , wherein a top surface of the base fin structure is coplanar with the top surface of the peripheral zone. 
     
     
       4. The method of fabricating a fin field effect transistor device according to  claim 2 , wherein a top surface of the base fin structure is higher than the top surface of the peripheral zone. 
     
     
       5. The method of fabricating a fin field effect transistor device according to  claim 2 , wherein a top surface of the base fin structure is lower than the top surface of the peripheral zone. 
     
     
       6. The method of fabricating a fin field effect transistor device according to  claim 1 , wherein a top surface of the epitaxial fin structure is aligned to a top of the pair of spacers. 
     
     
       7. The method of fabricating a fin field effect transistor device according to  claim 1 , wherein a top surface of the epitaxial fin structure is higher than a top of the pair of spacers. 
     
     
       8. The method of fabricating a fin field effect transistor device according to  claim 1 , wherein a top surface of the epitaxial fin structure is lower than a top of the pair of spacers. 
     
     
       9. The method of fabricating a fin field effect transistor device according to  claim 1 , wherein the epitaxial fin structure physically contacts with a top surface of the base fin structure and comprises germanium (Ge). 
     
     
       10. The method of fabricating a fin field effect transistor device according to  claim 9 , wherein a percentage of the germanium (Ge) in the epitaxial fin structure is from 50% to 100%. 
     
     
       11. The method of fabricating a fin field effect transistor device according to  claim 1 , wherein a bottom surface of the epitaxial fin structure is coplanar with a top surface of the peripheral zone. 
     
     
       12. The method of fabricating a fin field effect transistor device according to  claim 1 , wherein a bottom surface of the epitaxial fin structure is higher than a top surface of the peripheral zone.