US9768261B2ActiveUtilityPatentIndex 51
Semiconductor structure and method of forming the same
Assignee: TAIWAN SEMICONDUCTOR MFG CO LTDPriority: Apr 17, 2015Filed: Apr 17, 2015Granted: Sep 19, 2017
Est. expiryApr 17, 2035(~8.8 yrs left)· nominal 20-yr term from priority
H10P 14/3444H10P 14/3411H10P 14/3408H10P 14/24H01L 29/167H01L 21/0262H01L 21/02529H01L 29/66795H01L 29/0649H01L 21/02532H01L 21/02579H01L 29/66545H01L 29/49H10D 64/66H10D 64/017H10D 62/115H10D 30/024H10D 64/511H10D 62/834H10D 30/6215
51
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Claims
Abstract
A semiconductor structure and a method for forming the same are provided. The semiconductor structure includes: a substrate; a fin structure protruding from the substrate, the fin structure extending along a first direction; isolation features disposed on both sides of the fin structure; a gate structure over the fin structure and extending on the isolation features along a second direction perpendicular to the first direction; and wherein the gate structure includes a first segment and a second segment, the second segment being over the first segment and including a greater dimension in the first direction than that of the first segment.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1. A method for forming a semiconductor structure comprising:
forming a fin structure along a first direction on a semiconductor substrate;
depositing a first layer over the semiconductor substrate and the fin structure by growing a group III or group V element-doped silicon; and
depositing a second layer over the first layer by growing a carbon or nitrogen-doped silicon; and
patterning the first layer and the second layer to form a dummy gate stack occupying a gate region over the fin structure and extending along a second direction perpendicular to the first direction.
2. The method of claim 1 , wherein the group III element comprises boron.
3. The method of claim 1 , wherein a concentration of the group III or group V element in the first silicon layer ranges from about 1E19 to about 1E22 atoms/cm 3 .
4. The method of claim 1 , wherein the temperature and the pressure used for depositing the first layer and the second layer are substantially the same.
5. The method of claim 1 , further comprising oxidizing the first layer and the second layer of the dummy gate stack.
6. The method of claim 5 , wherein the oxidizing is performed under a pressure ranging from about 2 to about 100 torr.
7. The method of claim 1 , wherein the oxidation rate of the first layer is greater than that of the second layer.
8. The method of claim 5 , further comprising removing an un-oxidized portion of the dummy gate stack.
9. A method for forming a semiconductor structure, comprising:
forming a fin structure along a first direction on a semiconductor substrate;
depositing a first layer over the semiconductor substrate and the fin structure by growing a group III or group V element-doped silicon, the first layer having a first oxidation rate;
depositing a second layer over the first layer by growing a carbon or nitrogen-doped silicon, the second layer having a second oxidation rate; wherein the first oxidation rate is greater than the second oxidation rate; and
oxidizing the first layer and the second layer; and
removing an un-oxidized portion of the first layer and an un-oxidized portion of the second layer.
10. The method of claim 9 , further comprising:
patterning the first layer and the second layer to form a sidewall over the fin structure, extending along a second direction perpendicular to the first direction; and
wherein the oxidizing the first layer and the second layer comprises oxidizing from the sidewall.
11. The method of claim 10 , wherein the oxidizing is performed under a pressure ranging from about 2 torr to about 100 torr.
12. The method of claim 9 , wherein the first layer is formed by depositing a silicon layer in-situ doped with a group III or a group V element.
13. The method of claim 9 , wherein the first layer is formed by:
depositing a silicon layer; and
implanting the silicon layer with a group III or a group V element.
14. A method for forming a semiconductor structure, comprising:
forming a fin structure along a first direction on a semiconductor substrate;
depositing a first doped layer over the semiconductor substrate and the fin structure by growing a boron-doped silicon;
depositing a second doped layer over the first layer by growing a carbon or nitrogen-doped silicon, and
patterning the first doped layer and the second doped layer to form a dummy gate stack occupying a gate region over the fin structure, extending along a second direction perpendicular to the first direction, the dummy gate stack having a sidewall.
15. The method of claim 14 , wherein the first doped layer is in-situ doped with boron within a range of from about 1E19 to about 1E22 atoms/cm 3 .
16. The method of claim 14 , further comprising:
oxidizing the first doped layer and the second doped layer from the sidewall.
17. The method of claim 1 , further comprising:
removing a portion of the dummy gate stack by a plasma etch operation.
18. The method of claim 9 , wherein the removing the un-oxidized portion of the first layer and the un-oxidized portion of the second layer comprises a plasma etch operation.
19. The method of claim 8 , wherein the removing the un-oxidized portion of the dummy gate stack exposes a surface of the fin structure.
20. The method of claim 19 , further comprising forming a high-K dielectric layer on the surface of the fin structure.Cited by (0)
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