Threshold filtering of compressed domain data using steering vector

Abstract

In an embodiment, a processor includes a compression domain threshold filter coupled to a plurality of cores. The compression domain threshold filter is to: receive a sample vector of compressed data to be filtered; calculate, based at least on a first subset of the elements of the sample vector, an estimated upper bound value of a dot product of the sample vector and a steering vector; determine whether the estimated upper bound value of the dot product satisfies a filter threshold value; and in response to a determination that the estimated upper bound value of the dot product does not satisfy the filter threshold value, discard the sample vector without completion of a calculation of the dot product of the sample vector and the steering vector. Other embodiments are described and claimed.

What is claimed is: 
     
       1. A method comprising:
 receiving, at a hardware accelerator of a processor, a sample vector comprising a plurality of data elements; 
 initiating, by the hardware accelerator, an iterative calculation of a second value using all of the plurality of data elements of the sample vector; 
 in response to reaching a first checkpoint element of the sample vector, calculating, by the hardware accelerator, a first value using a first subset of the plurality of data elements of the sample vector, wherein the first value is an estimated result of the iterative calculation if completed using all of the plurality of data elements of the sample vector; 
 determining, by the hardware accelerator, whether the first value satisfies a filter threshold value; and 
 in response to a determination that the first value does not satisfy the filter threshold value, discarding the sample vector without completion of the iterative calculation of the second value using all of the plurality of data elements of the sample vector, 
 wherein the first checkpoint element is one of a plurality of checkpoint elements included in the sample vector, wherein the plurality of checkpoint elements is a subset of the plurality of data elements of the sample vector, wherein the hardware accelerator is to not calculate the first value for a set of data elements prior to reaching the first checkpoint element. 
 
     
     
       2. The method of  claim 1 , wherein the iterative calculation calculates a dot product of the sample vector and a steering vector. 
     
     
       3. The method of  claim 2 , wherein each iteration of the iterative calculation comprises multiplying one element of the sample vector and one element of the steering vector. 
     
     
       4. The method of  claim 2 , further comprising updating the steering vector based on a covariance matrix. 
     
     
       5. A processor comprising:
 a plurality of processing elements; and 
 circuitry to:
 receive a sample vector to be filtered, the sample vector comprising a plurality of data elements; 
 initiate an iterative calculation of a second value using all of the plurality of data elements of the sample vector; 
 prior to completion of the iterative calculation of the second value, in response to reaching a first checkpoint element of the sample vector, calculate a first value using a first subset of the plurality of data elements of the sample vector, wherein the first value is an estimated result of the iterative calculation if completed using all of the plurality of data elements of the sample vector; 
 determine whether the first value satisfies a filter threshold value; and 
 in response to a determination that the first value does not satisfy the filter threshold value, discard the sample vector without completion of the iterative calculation of the second value using all of the plurality of data elements of the sample vector, 
 wherein the first checkpoint element is one of a plurality of checkpoint elements included in the sample vector, wherein the plurality of checkpoint elements is a subset of the plurality of data elements of the sample vector, wherein the circuitry is to not calculate the first value for a set of data elements prior to reaching the first checkpoint element. 
 
 
     
     
       6. The processor of  claim 5 , wherein each of the plurality of data elements comprises compressed data. 
     
     
       7. The processor of  claim 5 , wherein the iterative calculation calculates a dot product of the sample vector and a steering vector. 
     
     
       8. The processor of  claim 7 , wherein each iteration of the iterative calculation comprises multiplying one element of the sample vector and one element of the steering vector. 
     
     
       9. The processor of  claim 5 , wherein the circuitry is further to:
 in response to a determination that the first value satisfies the filter threshold value, continuing the iterative calculation of the second value using at least some of the plurality of data elements. 
 
     
     
       10. A processor comprising:
 a plurality of processing elements; and 
 logic to:
 iterate through a plurality of data elements of a sample vector to perform a vector calculation comprising a plurality of iterative calculations; 
 upon reaching a data element specified as a first checkpoint element in the sample vector, calculate a first value using a first subset of the plurality of iterative calculations, wherein the first value is an estimated result of the vector calculation upon completion of the plurality of iterative calculations, wherein the sample vector comprises a plurality of checkpoint elements, wherein the plurality of checkpoint elements is a subset of the plurality of data elements of the sample vector, wherein the logic is to not calculate the first value for a set of data elements prior to reaching the first checkpoint element; 
 determine whether the first value satisfies a filter threshold value; and 
 continue to iterate through the plurality of data elements only upon a determination that the first value satisfies the filter threshold value. 
 
 
     
     
       11. The processor of  claim 10 , wherein the vector calculation calculates a dot product of the sample vector and a steering vector. 
     
     
       12. The processor of  claim 11 , wherein each iteration of the iterative calculation comprises multiplying one element of the sample vector and one element of the steering vector. 
     
     
       13. The processor of  claim 11 , wherein the circuitry is further to update the steering vector using a covariance matrix. 
     
     
       14. The processor of  claim 10 , wherein the logic is further to:
 in response to a determination that the first value does not satisfy the filter threshold value, discard the sample vector without completion of the plurality of the iterative calculations.