Individual holder
SWOBODA GARY L
US·19 granted patents·9 pending applications·27 citations·filing 2003–2012
Individually held — no corporate assignee on record.
Top patents by PatentIndex Score
28 records- 0195US8136003B2JTAG debug test system adapter with three sets of leadsSWOBODA GARY L·Filed 2010·Granted Mar 13, 2012·9 cites·6 claims
- 0282US8261143B2Select signal and component override signal controlling multiplexing TDI/TDOSWOBODA GARY L·Filed 2008·Granted Sep 4, 2012·5 cites·3 claims
- 0382US8255749B2Ascertaining configuration by storing data signals in a topology registerSWOBODA GARY L·Filed 2009·Granted Aug 28, 2012·4 cites·3 claims
- 0476US8219863B2TAP state count specifying advanced mode command and command dataSWOBODA GARY L·Filed 2010·Granted Jul 10, 2012·3 cites·4 claims
- 0573US8607088B2Synchronizing remote devices with synchronization sequence on JTAG control leadSWOBODA GARY L·Filed 2011·Granted Dec 10, 2013·1 cites·4 claims
- 0670US8341474B2Moving all TAP controllers through update-IR state after selecting individual TAPsSWOBODA GARY L·Filed 2011·Granted Dec 25, 2012·1 cites·4 claims
- 0770US8095840B2Serial scan chain in a star configurationSWOBODA GARY L·Filed 2011·Granted Jan 10, 2012·1 cites·4 claims
- 0868US8627145B2High volume recording of instrumentation data varying instrumentation volumes to prevent data lossSWOBODA GARY L·Filed 2010·Granted Jan 7, 2014·2 cites·7 claims
- 0962US8522093B2Advanced/enhanced protocol circuitry connected to TCK, TMS, and topology circuitrySWOBODA GARY L·Filed 2012·Granted Aug 27, 2013·0 cites·3 claims
- 1060US8341471B2Apparatus and method for synchronization within systems having modules processing a clock signal at different ratesSWOBODA GARY L·Filed 2011·Granted Dec 25, 2012·1 cites·5 claims
- 1158US8458505B2Adapter and scan test logic synchronizing from idle stateSWOBODA GARY L·Filed 2012·Granted Jun 4, 2013·0 cites·4 claims
- 1258US8225126B2Adaptor detecting sequence on TMS and coupling TAP to TCKSWOBODA GARY L·Filed 2011·Granted Jul 17, 2012·0 cites·5 claims
- 1355US8112668B2Dynamic broadcast of configuration loads supporting multiple transfer formatsSWOBODA GARY L·Filed 2009·Granted Feb 7, 2012·0 cites·21 claims
- 1453US9170889B2Recovery from the loss of synchronization with finite state machinesSWOBODA GARY L·Filed 2009·Granted Oct 27, 2015·0 cites·4 claims
- 1553US8266486B2Preventing erroneous operation in a system which may enable unsupported featuresSWOBODA GARY L·Filed 2009·Granted Sep 11, 2012·0 cites·5 claims
- 1651US8122311B2Apparatus and method for clock signal synchronization in JTAG testing in systems having selectable modules processing data signals at different ratesSWOBODA GARY L·Filed 2011·Granted Feb 21, 2012·0 cites·15 claims
- 1751US8067955B2Preventing erroneous operation in a system where synchronized operation is requiredSWOBODA GARY L·Filed 2009·Granted Nov 29, 2011·0 cites·3 claims
- 1851US2013091361A1Minimizing the Amount of Time Stamp Information Reported With Instrumentation DataSWOBODA GARY L·Filed 2010·Application pending·0 cites
- 1949US8924767B2Minimizing the use of chip routing resources when using timestamped instrumentation data by transmitting the most significant bits of the timestamp in series and transmitting the least significant bits of the timestamp in parallelSWOBODA GARY L·Filed 2010·Granted Dec 30, 2014·0 cites·9 claims
- 2049US2006059387A1Processor condition sensing circuits, systems and methodsSWOBODA GARY L·Filed 2005·Application pending·0 cites
- 2146US8473920B2Application initiated tracing of its operation beginning with resetSWOBODA GARY L·Filed 2011·Granted Jun 25, 2013·0 cites·9 claims
- 2245US2004117487A1Apparatus and method for capturing an event or combination of events resulting in a trigger signal in a target processorSWOBODA GARY L·Filed 2003·Application pending·0 cites
- 2345US2009160507A1Apparatus and method for clock signal synchronization in JTAG testing in systems having selectable modules processing data signals at different ratesSWOBODA GARY L·Filed 2007·Application pending·0 cites
- 2444US2009160488A1Apparatus and method for clock signal synchronization in JTAG testing in systems having modules processing clock signals at different ratesSWOBODA GARY L·Filed 2007·Application pending·0 cites
- 2544US2006267815A1Debug Tool Communication Through a Tool to Tool ConnectionSWOBODA GARY L·Filed 2006·Application pending·0 cites
- 2644US2006273944A1System With Trace Capability Accessed Through the Chip Being TracedSWOBODA GARY L·Filed 2006·Application pending·0 cites
- 2744US2004117701A1Apparatus and method for identification of a primary code start sync point following a return to primary code executionSWOBODA GARY L·Filed 2003·Application pending·0 cites
- 2841US2013138420A1Managing Varying Instrumentation Volumes to Prevent Data LossSWOBODA GARY L·Filed 2010·Application pending·0 cites
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