Inventor · disambiguated record
Hiroaki Niimi
Also filed as: NIIMI HIROAKI
126 granted patents·19 pending applications·1,001 citations·filing 2001–2022
99Inventor score
Top patents by PatentIndex Score
145 records- 0199US9640636B1Methods of forming replacement gate structures and bottom and top source/drain regions on a vertical transistor deviceGLOBALFOUNDRIES INC·Filed 2016·Granted May 2, 2017·88 cites·24 claims
- 0299US9397003B1Method for forming source/drain contacts during CMOS integration using confined epitaxial growth techniquesGLOBALFOUNDRIES INC·Filed 2015·Granted Jul 19, 2016·79 cites·20 claims
- 0398US10236292B1Complementary FETs with wrap around contacts and methods of forming sameGLOBALFOUNDRIES INC·Filed 2018·Granted Mar 19, 2019·33 cites·9 claims
- 0498US10192867B1Complementary FETs with wrap around contacts and method of forming sameGLOBALFOUNDRIES INC·Filed 2018·Granted Jan 29, 2019·134 cites·6 claims
- 0597US11264274B2Reverse contact and silicide process for three-dimensional logic devicesTOKYO ELECTRON LTD·Filed 2020·Granted Mar 1, 2022·5 cites·20 claims
- 0697US10236218B1Methods, apparatus and system for forming wrap-around contact with dual silicideGLOBALFOUNDRIES INC·Filed 2018·Granted Mar 19, 2019·19 cites·15 claims
- 0797US9911738B1Vertical-transport field-effect transistors with a damascene gate strapGLOBALFOUNDRIES INC·Filed 2017·Granted Mar 6, 2018·18 cites·20 claims
- 0897US9484255B1Hybrid source and drain contact formation using metal liner and metal insulator semiconductor contactsIBM·Filed 2015·Granted Nov 1, 2016·15 cites·20 claims
- 0996US9972682B2Low resistance source drain contact formationIBM·Filed 2016·Granted May 15, 2018·13 cites·16 claims
- 1095US9917060B1Forming a contact for a semiconductor deviceIBM·Filed 2016·Granted Mar 13, 2018·11 cites·19 claims
- 1195US9589851B2Dipole-based contact structure to reduce metal-semiconductor contact resistance in MOSFETsIBM·Filed 2015·Granted Mar 7, 2017·13 cites·15 claims
- 1293US6730566B2Method for non-thermally nitrided gate formation for high voltage devicesTEXAS INSTRUMENTS INC·Filed 2002·Granted May 4, 2004·74 cites·20 claims
- 1393US6610614B2Method for uniform nitridization of ultra-thin silicon dioxide layers in transistor gatesTEXAS INSTRUMENTS INC·Filed 2001·Granted Aug 26, 2003·67 cites·18 claims
- 1492US9070785B1High-k / metal gate CMOS transistors with TiN gatesTEXAS INSTRUMENTS INC·Filed 2014·Granted Jun 30, 2015·10 cites·19 claims
- 1592US6503846B1Temperature spike for uniform nitridization of ultra-thin silicon dioxide layers in transistor gatesTEXAS INSTRUMENTS INC·Filed 2001·Granted Jan 7, 2003·64 cites·13 claims
- 1691US10141446B2Formation of bottom junction in vertical FET devicesGLOBALFOUNDRIES INC·Filed 2017·Granted Nov 27, 2018·5 cites·13 claims
- 1791US9735111B2Dual metal-insulator-semiconductor contact structure and formulation methodIBM·Filed 2015·Granted Aug 15, 2017·5 cites·16 claims
- 1891US8643113B2Structure and method for metal gate stack oxygen concentration control using an oxygen diffusion barrier layer and a sacrificial oxygen gettering layerCHAMBERS JAMES JOSEPH·Filed 2008·Granted Feb 4, 2014·14 cites·8 claims
- 1991US6548366B2Method of two-step annealing of ultra-thin silicon dioxide layers for uniform nitrogen profileTEXAS INSTRUMENTS INC·Filed 2001·Granted Apr 15, 2003·56 cites·16 claims
- 2090US6632747B2Method of ammonia annealing of ultra-thin silicon dioxide layers for uniform nitrogen profileTEXAS INSTRUMENTS INC·Filed 2001·Granted Oct 14, 2003·51 cites·11 claims
- 2189US10475904B2Methods of forming merged source/drain regions on integrated circuit productsGLOBALFOUNDRIES INC·Filed 2018·Granted Nov 12, 2019·5 cites·19 claims
- 2289US9177806B2System and method for mitigating oxide growth in a gate dielectricBEVAN MALCOLM J·Filed 2011·Granted Nov 3, 2015·6 cites·12 claims
- 2389US9087918B2Structure and method for metal gate stack oxygen concentration control using an oxygen diffusion barrier layer and a sacrificial oxygen gettering layerTEXAS INSTRUMENTS INC·Filed 2014·Granted Jul 21, 2015·6 cites·42 claims
- 2488US10211094B2Hybrid source and drain contact formation using metal liner and metal insulator semiconductor contactsIBM·Filed 2017·Granted Feb 19, 2019·3 cites·15 claims
- 2588US9543216B2Integration of hybrid germanium and group III-V contact epilayer in CMOSGLOBALFOUNDRIES INC·Filed 2015·Granted Jan 10, 2017·5 cites·15 claims
- 2688US9397009B2Structure and method for metal gate stack oxygen concentration control using an oxygen diffusion barrier layer and a sacrificial oxygen gettering layerTEXAS INSTRUMENTS INC·Filed 2015·Granted Jul 19, 2016·4 cites·19 claims
- 2787US10056334B2Dual metal-insulator-semiconductor contact structure and formulation methodIBM·Filed 2017·Granted Aug 21, 2018·3 cites·16 claims
- 2887US9842933B1Formation of bottom junction in vertical FET devicesGLOBALFOUNDRIES INC·Filed 2016·Granted Dec 12, 2017·4 cites·14 claims
- 2987US9640535B2Method for forming source/drain contacts during CMOS integration using confined epitaxial growth techniques and the resulting semiconductor devicesGLOBALFOUNDRIES INC·Filed 2016·Granted May 2, 2017·4 cites·20 claims
- 3087US9202884B2Methods to enhance effective work function of mid-gap metal by incorporating oxygen and hydrogen at a low thermal budgetNIIMI HIROAKI·Filed 2011·Granted Dec 1, 2015·6 cites·11 claims
- 3187US7906441B2System and method for mitigating oxide growth in a gate dielectricTEXAS INSTRUMENTS INC·Filed 2007·Granted Mar 15, 2011·6 cites·20 claims
- 3286US10818599B2Hybrid source and drain contact formation using metal liner and metal insulator semiconductor contactsIBM·Filed 2019·Granted Oct 27, 2020·2 cites·9 claims
- 3386US10115824B2Forming a contact for a semiconductor deviceIBM·Filed 2017·Granted Oct 30, 2018·4 cites·18 claims
- 3485US7834743B2RFID tag and RFID tag communication distance modification methodPANASONIC CORP·Filed 2005·Granted Nov 16, 2010·22 cites·11 claims
- 3584US10535606B2Dual metal-insulator-semiconductor contact structure and formulation methodIBM·Filed 2018·Granted Jan 14, 2020·2 cites·20 claims
- 3684US7199020B2Nitridation of STI liner oxide for modulating inverse width effects in semiconductor devicesTEXAS INSTRUMENTS INC·Filed 2005·Granted Apr 3, 2007·12 cites·17 claims
- 3782US10347581B2Contact formation in semiconductor devicesIBM·Filed 2017·Granted Jul 9, 2019·3 cites·17 claims
- 3882US7163877B2Method and system for modifying a gate dielectric stack containing a high-k layer using plasma processingTEXAS INSTRUMENTS INC·Filed 2004·Granted Jan 16, 2007·26 cites·51 claims
- 3981US10510617B2CMOS VFET contacts with trench solid and liquid phase epitaxyIBM·Filed 2018·Granted Dec 17, 2019·3 cites·19 claims
- 4081US8536654B2Structure and method for dual work function metal gate CMOS with selective cappingCHAMBERS JAMES JOSEPH·Filed 2011·Granted Sep 17, 2013·5 cites·17 claims
- 4181US7393787B2Formation of nitrogen containing dielectric layers having a uniform nitrogen distribution therein using a high temperature chemical treatmentTEXAS INSTRUMENTS INC·Filed 2005·Granted Jul 1, 2008·9 cites·11 claims
- 4280US9780192B2Fringe capacitance reduction for replacement gate CMOSTEXAS INSTRUMENTS INC·Filed 2016·Granted Oct 3, 2017·2 cites·14 claims
- 4380US7960802B2Methods to enhance effective work function of mid-gap metal by incorporating oxygen and hydrogen at a low thermal budgetTEXAS INSTRUMENTS INC·Filed 2009·Granted Jun 14, 2011·4 cites·10 claims
- 4479US9721847B2High-k / metal gate CMOS transistors with TiN gatesTEXAS INSTRUMENTS INC·Filed 2015·Granted Aug 1, 2017·2 cites·19 claims
- 4579US9000539B2Metal-gate MOS transistor and method of forming the transistor with reduced gate-to-source and gate-to-drain overlap capacitanceTEXAS INSTRUMENTS INC·Filed 2012·Granted Apr 7, 2015·4 cites·6 claims
- 4678US7560792B2Reliable high voltage gate dielectric layers using a dual nitridation processTEXAS INSTRUMENTS INC·Filed 2007·Granted Jul 14, 2009·5 cites·4 claims
- 4776US10243073B2Vertical channel field-effect transistor (FET) process compatible long channel transistorsIBM·Filed 2016·Granted Mar 26, 2019·2 cites·10 claims
- 4876US9337297B2Fringe capacitance reduction for replacement gate CMOSTEXAS INSTRUMENTS INC·Filed 2014·Granted May 10, 2016·2 cites·20 claims
- 4975US9412695B1Interconnect structures and methods of fabricationGLOBALFOUNDRIES INC·Filed 2015·Granted Aug 9, 2016·2 cites·20 claims
- 5075US7459390B2Method for forming ultra thin low leakage multi gate devicesTEXAS INSTRUMENTS INC·Filed 2006·Granted Dec 2, 2008·6 cites·19 claims
Showing the top 50 of 145 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →