Inventor · disambiguated record
Maciej Wiatr
Also filed as: WIATR MACIEJ
36 granted patents·11 pending applications·154 citations·filing 2007–2016
97Inventor score
Top patents by PatentIndex Score
47 records- 0190US8574991B2Asymmetric transistor devices formed by asymmetric spacers and tilted implantationHOENTSCHEL JAN·Filed 2012·Granted Nov 5, 2013·10 cites·13 claims
- 0290US8536009B2Differential threshold voltage adjustment in PMOS transistors by differential formation of a channel semiconductor materialJAVORKA PETER·Filed 2011·Granted Sep 17, 2013·13 cites·19 claims
- 0390US8158482B2Asymmetric transistor devices formed by asymmetric spacers and tilted implantationHOENTSCHEL JAN·Filed 2009·Granted Apr 17, 2012·15 cites·12 claims
- 0490US8124467B2Reducing silicide resistance in silicon/germanium-containing drain/source regions of transistorsKRONHOLZ STEPHAN·Filed 2010·Granted Feb 28, 2012·11 cites·18 claims
- 0589US9812573B1Semiconductor structure including a transistor having stress creating regions and method for the formation thereofGLOBALFOUNDRIES INC·Filed 2016·Granted Nov 7, 2017·7 cites·20 claims
- 0688US8748275B2Semiconductor devices comprising a channel semiconductor alloy formed with reduced STI topographyTHEES HANS-JUERGEN·Filed 2011·Granted Jun 10, 2014·11 cites·24 claims
- 0787US9515155B2E-fuse design for high-K metal-gate technologyGLOBALFOUNDRIES INC·Filed 2013·Granted Dec 6, 2016·9 cites·23 claims
- 0886US8343826B2Method for forming a transistor comprising high-k metal gate electrode structures including a polycrystalline semiconductor material and embedded strain-inducing semiconductor alloysGLOBALFOUNDRIES INC·Filed 2011·Granted Jan 1, 2013·8 cites·20 claims
- 0986US8212184B2Cold temperature control in a semiconductor deviceMOWRY ANTHONY·Filed 2009·Granted Jul 3, 2012·15 cites·25 claims
- 1085US9263582B2Strain engineering in semiconductor devices by using a piezoelectric materialGLOBALFOUNDRIES INC·Filed 2014·Granted Feb 16, 2016·6 cites·16 claims
- 1182US8338892B2Strain enhancement in transistors comprising an embedded strain-inducing semiconductor alloy by corner rounding at the top of the gate electrodeKRONHOLZ STEPHAN·Filed 2010·Granted Dec 25, 2012·5 cites·20 claims
- 1277US7939399B2Semiconductor device having a strained semiconductor alloy concentration profileGLOBALFOUNDRIES INC·Filed 2007·Granted May 10, 2011·7 cites·10 claims
- 1374US8481404B2Leakage control in field effect transistors based on an implantation species introduced locally at the STI edgeKAMMLER THORSTEN·Filed 2010·Granted Jul 9, 2013·4 cites·20 claims
- 1473US9627409B2Semiconductor device with thin-film resistorGLOBALFOUNDRIES INC·Filed 2015·Granted Apr 18, 2017·2 cites·17 claims
- 1571US8939765B2Reduction of defect rates in PFET transistors comprising a Si/Ge semiconductor material formed by epitaxial growthKRONHOLZ STEPHAN·Filed 2010·Granted Jan 27, 2015·3 cites·22 claims
- 1671US8018260B2Compensation of degradation of performance of semiconductor devices by clock duty cycle adaptationADVANCED MICRO DEVICES INC·Filed 2009·Granted Sep 13, 2011·4 cites·25 claims
- 1770US8481381B2Superior integrity of high-k metal gate stacks by preserving a resist material above end caps of gate electrode structuresKRONHOLZ STEPHAN-DETLEF·Filed 2011·Granted Jul 9, 2013·2 cites·10 claims
- 1870US7790537B2Method for creating tensile strain by repeatedly applied stress memorization techniquesGLOBALFOUNDRIES INC·Filed 2007·Granted Sep 7, 2010·4 cites·11 claims
- 1967US8884379B2Strain engineering in semiconductor devices by using a piezoelectric materialKRONHOLZ STEPHAN·Filed 2010·Granted Nov 11, 2014·2 cites·17 claims
- 2067US8524567B2Semiconductor fuse with enhanced post-programming resistanceKURZ ANDREAS·Filed 2011·Granted Sep 3, 2013·1 cites·9 claims
- 2167US8460980B2Transistor comprising an embedded semiconductor alloy in drain and source regions extending under the gate electrodeKRONHOLZ STEPHAN·Filed 2010·Granted Jun 11, 2013·2 cites·15 claims
- 2266US8778772B2Method of forming transistor with increased gate widthTAN CHUNG FOONG·Filed 2012·Granted Jul 15, 2014·3 cites·16 claims
- 2366US8709902B2Sacrificial spacer approach for differential source/drain implantation spacers in transistors comprising a high-k metal gate electrode structureSCHEIPER THILO·Filed 2011·Granted Apr 29, 2014·2 cites·24 claims
- 2466US8664049B2Semiconductor element formed in a crystalline substrate material and comprising an embedded in situ doped semiconductor materialKRONHOLZ STEPHAN·Filed 2010·Granted Mar 4, 2014·2 cites·22 claims
- 2565US8673668B2Test structure for controlling the incorporation of semiconductor alloys in transistors comprising high-k metal gate electrode structuresKRONHOLZ STEPHAN·Filed 2010·Granted Mar 18, 2014·2 cites·17 claims
- 2662US8097519B2SOI device having a substrate diode formed by reduced implantation energyWIATR MACIEJ·Filed 2008·Granted Jan 17, 2012·3 cites·13 claims
- 2762US7897451B2Method for creating tensile strain by selectively applying stress memorization techniques to NMOS transistorsGLOBALFOUNDRIES INC·Filed 2008·Granted Mar 1, 2011·1 cites·21 claims
- 2860US9153534B2Semiconductor fuse with enhanced post-programming resistanceGLOBAL FOUNDRIES INC·Filed 2014·Granted Oct 6, 2015·0 cites·19 claims
- 2954US2013313553A1Semiconductor fuse with enhanced post-programming resistanceGLOBALFOUNDRIES INC·Filed 2013·Application pending·0 cites
- 3053US8722481B2Superior integrity of high-k metal gate stacks by preserving a resist material above end caps of gate electrode structuresGLOBALFOUNDRIES INC·Filed 2013·Granted May 13, 2014·0 cites·10 claims
- 3149US8456224B2Compensation of operating time-related degradation of operating speed by a constant total die power modeWIATR MACIEJ·Filed 2009·Granted Jun 4, 2013·0 cites·22 claims
- 3249US2010025743A1Transistor with embedded si/ge material having enhanced boron confinementHOENTSCHEL JAN·Filed 2009·Application pending·0 cites
- 3347US7923338B2Increasing stress transfer efficiency in a transistor by reducing spacer width during the drain/source implantation sequenceGLOBALFOUNDRIES INC·Filed 2008·Granted Apr 12, 2011·0 cites·24 claims
- 3445US2009085652A1Compensation of operating time related degradation of operating speed by adapting the supply voltageWIATR MACIEJ·Filed 2008·Application pending·0 cites
- 3543US8836047B2Reducing defect rate during deposition of a channel semiconductor alloy into an in situ recessed active regionKRONHOLZ STEPHAN-DETLEF·Filed 2012·Granted Sep 16, 2014·0 cites·2 claims
- 3643US2016071947A1Method including a replacement of a dummy gate structure with a gate structure including a ferroelectric materialGLOBALFOUNDRIES INC·Filed 2014·Application pending·0 cites
- 3742US8298924B2Method for differential spacer removal by wet chemical etch process and device with differential spacer structureWIATR MACIEJ·Filed 2007·Granted Oct 30, 2012·0 cites·13 claims
- 3842US2015200270A1Field effect transistors for high-performance and low-power applicationsGLOBALFOUNDRIES INC·Filed 2014·Application pending·0 cites
- 3941US2009001479A1Transistor having reduced gate resistance and enhanced stress transfer efficiency and method of forming the sameWIATR MACIEJ·Filed 2008·Application pending·0 cites
- 4040US8722486B2Enhancing deposition uniformity of a channel semiconductor alloy by forming a recess prior to the well implantationKRONHOLZ STEPHAN·Filed 2010·Granted May 13, 2014·0 cites·22 claims
- 4139US8652913B2Method for forming silicon/germanium containing drain/source regions in transistors with reduced silicon/germanium lossGEHRING ANDREAS·Filed 2007·Granted Feb 18, 2014·0 cites·16 claims
- 4239US2012025315A1Transistor with Embedded Strain-Inducing Material and Dummy Gate Electrodes Positioned Adjacent to the Active RegionKRONHOLZ STEPHAN·Filed 2011·Application pending·0 cites
- 4338US2013175577A1NFET Device with Tensile Stressed Channel Region and Methods of Forming SameTAN CHUNG FOONG·Filed 2012·Application pending·0 cites
- 4437US8334573B2Buried etch stop layer in trench isolation structures for superior surface planarity in densely packed semiconductor devicesWIATR MACIEJ·Filed 2010·Granted Dec 18, 2012·0 cites·16 claims
- 4537US2012153354A1Performance enhancement in transistors comprising high-k metal gate stacks and an embedded stressor by performing a second epitaxy stepKRONHOLZ STEPHAN·Filed 2011·Application pending·0 cites
- 4636US2010327358A1Semiconductor element formed in a crystalline substrate material and comprising an embedded in situ n-doped semiconductor materialKRONHOLZ STEPHAN·Filed 2010·Application pending·0 cites
- 4733US2013175585A1Methods of Forming Faceted Stress-Inducing Stressors Proximate the Gate Structure of a TransistorTAN CHUNG FOONG·Filed 2012·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →