Inventor · disambiguated record
Roman Boschke
Also filed as: BOSCHKE ROMAN
34 granted patents·8 pending applications·87 citations·filing 2007–2016
96Inventor score
Files withGLOBALFOUNDRIES INC14KRONHOLZ STEPHAN6KURZ ANDREAS4WIATR MACIEJ3ADVANCED MICRO DEVICES INC2
Top patents by PatentIndex Score
42 records- 0188US8497180B2Transistor with boot shaped source/drain regionsJAVORKA PETER·Filed 2011·Granted Jul 30, 2013·10 cites·16 claims
- 0287US9515155B2E-fuse design for high-K metal-gate technologyGLOBALFOUNDRIES INC·Filed 2013·Granted Dec 6, 2016·9 cites·23 claims
- 0387US8609498B2Transistor with embedded Si/Ge material having reduced offset and superior uniformityKRONHOLZ STEPHAN·Filed 2011·Granted Dec 17, 2013·8 cites·18 claims
- 0482US8338892B2Strain enhancement in transistors comprising an embedded strain-inducing semiconductor alloy by corner rounding at the top of the gate electrodeKRONHOLZ STEPHAN·Filed 2010·Granted Dec 25, 2012·5 cites·20 claims
- 0580US8735241B1Semiconductor device structure and methods for forming a CMOS integrated circuit structureGLOBALFOUNDRIES INC·Filed 2013·Granted May 27, 2014·4 cites·13 claims
- 0680US7569437B2Formation of transistor having a strained channel region including a performance enhancing material composition utilizing a mask patternADVANCED MICRO DEVICES INC·Filed 2007·Granted Aug 4, 2009·6 cites·11 claims
- 0776US8617940B2SOI device with a buried insulating material having increased etch resistivityKURZ ANDREAS·Filed 2009·Granted Dec 31, 2013·5 cites·20 claims
- 0874US11114435B2FinFET having locally higher fin-to-fin pitchIMEC VZW·Filed 2016·Granted Sep 7, 2021·2 cites·17 claims
- 0974US8481404B2Leakage control in field effect transistors based on an implantation species introduced locally at the STI edgeKAMMLER THORSTEN·Filed 2010·Granted Jul 9, 2013·4 cites·20 claims
- 1073US8962420B2Semiconductor device comprising a buried poly resistorKURZ ANDREAS·Filed 2009·Granted Feb 24, 2015·5 cites·16 claims
- 1172US9431508B2Simplified gate-first HKMG manufacturing flowGLOBALFOUNDRIES INC·Filed 2013·Granted Aug 30, 2016·3 cites·24 claims
- 1271US8939765B2Reduction of defect rates in PFET transistors comprising a Si/Ge semiconductor material formed by epitaxial growthKRONHOLZ STEPHAN·Filed 2010·Granted Jan 27, 2015·3 cites·22 claims
- 1371US7879667B2Blocking pre-amorphization of a gate electrode of a transistorGLOBALFOUNDRIES INC·Filed 2008·Granted Feb 1, 2011·3 cites·29 claims
- 1470US9006835B2Transistor with embedded Si/Ge material having reduced offset and superior uniformityGLOBALFOUNDRIES INC·Filed 2013·Granted Apr 14, 2015·2 cites·19 claims
- 1569US8268679B2Semiconductor device comprising eFUSES of enhanced programming efficiencyAUBEL OLIVER·Filed 2009·Granted Sep 18, 2012·5 cites·13 claims
- 1668US9117929B2Method for forming a strained transistor by stress memorization based on a stressed implantation maskWIRBELEIT FRANK·Filed 2011·Granted Aug 25, 2015·2 cites·18 claims
- 1766US8664049B2Semiconductor element formed in a crystalline substrate material and comprising an embedded in situ doped semiconductor materialKRONHOLZ STEPHAN·Filed 2010·Granted Mar 4, 2014·2 cites·22 claims
- 1863US9450073B2SOI transistor having drain and source regions of reduced length and a stressed dielectric material adjacent theretoWEI ANDY·Filed 2007·Granted Sep 20, 2016·2 cites·23 claims
- 1962US8097519B2SOI device having a substrate diode formed by reduced implantation energyWIATR MACIEJ·Filed 2008·Granted Jan 17, 2012·3 cites·13 claims
- 2061US8846467B1Silicidation of semiconductor devicesGLOBALFOUNDRIES INC·Filed 2013·Granted Sep 30, 2014·1 cites·16 claims
- 2159US7964458B2Method for forming a strained transistor by stress memorization based on a stressed implantation maskGLOBALFOUNDRIES INC·Filed 2007·Granted Jun 21, 2011·1 cites·14 claims
- 2254US8373244B2Temperature monitoring in a semiconductor device by thermocouples distributed in the contact structureGLOBALFOUNDRIES INC·Filed 2008·Granted Feb 12, 2013·2 cites·17 claims
- 2349US9023712B2Method for self-aligned removal of a high-K gate dielectric above an STI regionWEI ANDY·Filed 2008·Granted May 5, 2015·0 cites·20 claims
- 2448US9659928B2Semiconductor device having a high-K gate dielectric above an STI regionADVANCED MICRO DEVICES INC·Filed 2015·Granted May 23, 2017·0 cites·20 claims
- 2547US7923338B2Increasing stress transfer efficiency in a transistor by reducing spacer width during the drain/source implantation sequenceGLOBALFOUNDRIES INC·Filed 2008·Granted Apr 12, 2011·0 cites·24 claims
- 2645US8193066B2Semiconductor device comprising a silicon/germanium resistorKURZ ANDREAS·Filed 2009·Granted Jun 5, 2012·0 cites·4 claims
- 2745US7763515B2Transistor with embedded silicon/germanium material on a strained semiconductor on insulator substrateGLOBALFOUNDRIES INC·Filed 2007·Granted Jul 27, 2010·0 cites·14 claims
- 2844US9236440B2Sandwich silicidation for fully silicided gate formationGLOBALFOUNDRIES INC·Filed 2013·Granted Jan 12, 2016·0 cites·28 claims
- 2944US8697584B2Enhanced transistor performance of N-channel transistors by using an additional layer above a dual stress liner in a semiconductor deviceRICHTER RALF·Filed 2008·Granted Apr 15, 2014·0 cites·23 claims
- 3044US8426262B2Stress adjustment in stressed dielectric materials of semiconductor devices by stress relaxation based on radiationHOENTSCHEL JAN·Filed 2010·Granted Apr 23, 2013·0 cites·23 claims
- 3144US2010090321A1High-k etch stop layer of reduced thickness for patterning a dielectric material during fabrication of transistorsMULFINGER ROBERT·Filed 2008·Application pending·0 cites
- 3243US8377786B2Methods for fabricating semiconductor devicesGLOBALFOUNDRIES INC·Filed 2011·Granted Feb 19, 2013·0 cites·16 claims
- 3341US2014246696A1Transistor with embedded strain-inducing material formed in cavities formed in a silicon/germanium substrateGLOBALFOUNDRIES INC·Filed 2013·Application pending·0 cites
- 3441US2015179740A1Transistor device with strained layerGLOBAL FOUNDRIES INC·Filed 2013·Application pending·0 cites
- 3541US2009001479A1Transistor having reduced gate resistance and enhanced stress transfer efficiency and method of forming the sameWIATR MACIEJ·Filed 2008·Application pending·0 cites
- 3640US8722486B2Enhancing deposition uniformity of a channel semiconductor alloy by forming a recess prior to the well implantationKRONHOLZ STEPHAN·Filed 2010·Granted May 13, 2014·0 cites·22 claims
- 3739US8652913B2Method for forming silicon/germanium containing drain/source regions in transistors with reduced silicon/germanium lossGEHRING ANDREAS·Filed 2007·Granted Feb 18, 2014·0 cites·16 claims
- 3838US2011156857A1SILICON-BASED SEMICONDUCTOR DEVICE COMPRISING eFUSES FORMED BY AN EMBEDDED SEMICONDUCTOR ALLOYKURZ ANDREAS·Filed 2010·Application pending·0 cites
- 3937US8334573B2Buried etch stop layer in trench isolation structures for superior surface planarity in densely packed semiconductor devicesWIATR MACIEJ·Filed 2010·Granted Dec 18, 2012·0 cites·16 claims
- 4036US2010327358A1Semiconductor element formed in a crystalline substrate material and comprising an embedded in situ n-doped semiconductor materialKRONHOLZ STEPHAN·Filed 2010·Application pending·0 cites
- 4135US2012161249A1Reduction of Defect Rates in PFET Transistors Comprising a Silicon/Germanium Semiconductor Material by Providing a Graded Germanium ConcentrationKRONHOLZ STEPHAN-DETLEF·Filed 2011·Application pending·0 cites
- 4235US2013037866A1Method of forming a semiconductor deviceGLOBALFOUNDRIES INC·Filed 2011·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →