Inventor · disambiguated record
Satohiko Hoshino
Also filed as: HOSHINO SATOHIKO
10 granted patents·11 pending applications·50 citations·filing 1992–2023
85Inventor score
Top patents by PatentIndex Score
21 records- 0186US8242019B2Selective deposition of metal-containing cap layers for semiconductor devicesISHIZAKA TADAHIRO·Filed 2009·Granted Aug 14, 2012·12 cites·9 claims
- 0278US9370875B2Imprinting methodHOSHINO SATOHIKO·Filed 2012·Granted Jun 21, 2016·4 cites·8 claims
- 0377US8940638B2Substrate wiring method and semiconductor manufacturing deviceHOSHINO SATOHIKO·Filed 2011·Granted Jan 27, 2015·5 cites·12 claims
- 0475US8372739B2Diffusion barrier for integrated circuits formed from a layer of reactive metal and method of fabricationTOKYO ELECTRON LTD·Filed 2007·Granted Feb 12, 2013·8 cites·27 claims
- 0556US5282258AOptical fiber connecting apparatusDU PONT·Filed 1992·Granted Jan 25, 1994·21 cites·2 claims
- 0654US2010132613A1Fabrication of low dielectric constant insulating filmTOKYO ELECTRON LTD·Filed 2009·Application pending·0 cites
- 0751US12125818B2Technologies for plasma oxidation protection during hybrid bonding of semiconductor devicesTOKYO ELECTRON LTD·Filed 2022·Granted Oct 22, 2024·0 cites·22 claims
- 0851US2023075263A1Wafer bonding method using selective deposition and surface treatmentTOKYO ELECTRON LTD·Filed 2022·Application pending·0 cites
- 0950US2024194478A1Apparatus and methods for processing bonding semiconductor wafersTOKYO ELECTRON LTD·Filed 2022·Application pending·0 cites
- 1049US2025096190A1Methods and devices for improving bond strength of diffusion barriersTOKYO ELECTRON LTD·Filed 2023·Application pending·0 cites
- 1147US2024170444A1Bonding layer and processTOKYO ELECTRON LTD·Filed 2023·Application pending·0 cites
- 1242US7645481B2Fabrication of low dielectric constant insulating filmTOKYO ELECTRON LTD·Filed 2004·Granted Jan 12, 2010·0 cites·10 claims
- 1341US7569497B2Method and apparatus for forming insulating layerTOKYO ELECTRON LTD·Filed 2005·Granted Aug 4, 2009·0 cites·12 claims
- 1441US2007148985A1Method of manufacturing trench structure for deviceMIZUTANI NOBUTAKA·Filed 2007·Application pending·0 cites
- 1540US2006154492A1Forming method of low dielectric constant insulating film of semiconductor device, semiconductor device, and low dielectric constant insulating film forming apparatusTOKYO ELECTRON LTD·Filed 2006·Application pending·0 cites
- 1638US10553455B2Method for aligning chip components relative to substrate by using liquidTOKYO ELECTRON LTD·Filed 2017·Granted Feb 4, 2020·0 cites·12 claims
- 1736US2005153533A1Semiconductor manufacturing method and semiconductor manufacturing apparatusTOKYO ELECTRON LTD·Filed 2003·Application pending·0 cites
- 1835US2012071003A1Vacuum Processing Apparatus, Vacuum Processing Method, and Micro-Machining ApparatusDOBASHI KAZUYA·Filed 2011·Application pending·0 cites
- 1934US2013056024A1Substrate cleaning method and semiconductor manufacturing apparatusHOSHINO SATOHIKO·Filed 2011·Application pending·0 cites
- 2031US6890848B2Fabrication process of a semiconductor deviceTOKYO ELECTRON LTD·Filed 2001·Granted May 10, 2005·0 cites·25 claims
- 2129US2012052658A1Quantum dot forming method, storage medium storing a program and substrate processing apparatus for execution of the methodKANG SONG YUN·Filed 2011·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →