Inventor · disambiguated record
Sipeng Gu
Also filed as: GU SIPENG
58 granted patents·10 pending applications·87 citations·filing 2013–2023
97Inventor score
Top patents by PatentIndex Score
68 records- 0196US10347528B1Interconnect formation process using wire trench etch prior to via etch, and related interconnectGLOBALFOUNDRIES INC·Filed 2018·Granted Jul 9, 2019·21 cites·12 claims
- 0295US10014296B1Fin-type field effect transistors with single-diffusion breaks and methodGLOBALFOUNDRIES INC·Filed 2017·Granted Jul 3, 2018·19 cites·20 claims
- 0394US10446483B2Metal-insulator-metal capacitors with enlarged contact areasGLOBALFOUNDRIES INC·Filed 2018·Granted Oct 15, 2019·12 cites·20 claims
- 0493US10068810B1Multiple Fin heights with dielectric isolationGLOBALFOUNDRIES INC·Filed 2017·Granted Sep 4, 2018·9 cites·10 claims
- 0589US11430877B2Ion implantation to reduce nanosheet gate length variationAPPLIED MATERIALS INC·Filed 2020·Granted Aug 30, 2022·2 cites·20 claims
- 0687US10825811B2Gate cut first isolation formation with contact forming process mask protectionGLOBALFOUNDRIES INC·Filed 2019·Granted Nov 3, 2020·4 cites·18 claims
- 0783US9121890B2Planar metrology pad adjacent a set of fins of a fin field effect transistor deviceGLOBALFOUNDRIES INC·Filed 2013·Granted Sep 1, 2015·5 cites·15 claims
- 0880US11785860B2Top electrode for a memory device and methods of making such a memory deviceGLOBALFOUNDRIES US INC·Filed 2020·Granted Oct 10, 2023·1 cites·20 claims
- 0980US11133417B1Transistors with a sectioned epitaxial semiconductor layerGLOBALFOUNDRIES US INC·Filed 2020·Granted Sep 28, 2021·1 cites·20 claims
- 1080US10580857B2Method to form high performance fin profile for 12LP and aboveGLOBALFOUNDRIES INC·Filed 2018·Granted Mar 3, 2020·3 cites·19 claims
- 1179US11164795B2Transistors with source/drain regions having sections of epitaxial semiconductor materialGLOBALFOUNDRIES US INC·Filed 2020·Granted Nov 2, 2021·1 cites·20 claims
- 1277US9666476B2Dimension-controlled via formation processingGLOBALFOUNDRIES INC·Filed 2015·Granted May 30, 2017·2 cites·19 claims
- 1377US9129905B2Planar metrology pad adjacent a set of fins of a fin field effect transistor deviceGLOBALFOUNDRIES INC·Filed 2013·Granted Sep 8, 2015·3 cites·15 claims
- 1473US11955533B2Ion implantation to reduce nanosheet gate length variationAPPLIED MATERIALS INC·Filed 2022·Granted Apr 9, 2024·0 cites·20 claims
- 1572US10211317B1Vertical-transport field-effect transistors with an etched-through source/drain cavityGLOBALFOUNDRIES INC·Filed 2018·Granted Feb 19, 2019·1 cites·20 claims
- 1672US9305832B2Dimension-controlled via formation processingGLOBALFOUNDRIES INC·Filed 2014·Granted Apr 5, 2016·2 cites·18 claims
- 1770US10818557B2Integrated circuit structure to reduce soft-fail incidence and method of forming sameGLOBALFOUNDRIES INC·Filed 2018·Granted Oct 27, 2020·1 cites·19 claims
- 1869US11812670B2Memory device comprising a top via electrode and methods of making such a memory deviceGLOBALFOUNDRIES US INC·Filed 2022·Granted Nov 7, 2023·0 cites·16 claims
- 1969US11563085B2Transistors with separately-formed source and drainGLOBALFOUNDRIES US INC·Filed 2021·Granted Jan 24, 2023·0 cites·20 claims
- 2067US11908917B2Gate structuresGLOBALFOUNDRIES US INC·Filed 2021·Granted Feb 20, 2024·0 cites·18 claims
- 2163US12369312B2Vertical FinFet formation using directional depositionAPPLIED MATERIALS INC·Filed 2022·Granted Jul 22, 2025·0 cites·16 claims
- 2261US12457731B2Bottom contact formation for 4F2 vertical DRAMAPPLIED MATERIALS INC·Filed 2022·Granted Oct 28, 2025·0 cites·17 claims
- 2361US11728214B2Techniques for selective tungsten contact formation on semiconductor device elementsAPPLIED MATERIALS INC·Filed 2021·Granted Aug 15, 2023·0 cites·20 claims
- 2461US11569437B2Memory device comprising a top via electrode and methods of making such a memory deviceGLOBALFOUNDRIES US INC·Filed 2020·Granted Jan 31, 2023·0 cites·15 claims
- 2561US11127834B2Gate structuresGLOBALFOUNDRIES US INC·Filed 2019·Granted Sep 21, 2021·0 cites·20 claims
- 2659US11075268B2Transistors with separately-formed source and drainGLOBALFOUNDRIES US INC·Filed 2019·Granted Jul 27, 2021·0 cites·10 claims
- 2758US11610972B2Technique for reducing gate induced drain leakage in DRAM cellsAPPLIED MATERIALS INC·Filed 2021·Granted Mar 21, 2023·0 cites·11 claims
- 2857US2024130117A1Methods for forming dram devices without trench fill voidsAPPLIED MATERIALS INC·Filed 2023·Application pending·0 cites
- 2956US11538925B2Ion implantation to form step-oxide trench MOSFETAPPLIED MATERIALS INC·Filed 2020·Granted Dec 27, 2022·0 cites·20 claims
- 3056US2024251546A1DRAM Transistor Including Pillars Formed Using Low-Temperature Ion ImplantAPPLIED MATERIALS INC·Filed 2023·Application pending·0 cites
- 3155US11043566B2Semiconductor structures in a wide gate pitch region of semiconductor devicesGLOBALFOUNDRIES US INC·Filed 2019·Granted Jun 22, 2021·0 cites·20 claims
- 3255US2024079236A1SiC MOSFET Including Trench with Rounded CornersAPPLIED MATERIALS INC·Filed 2022·Application pending·0 cites
- 3355US2024292599A1DRAM Transistor Including Buried BitlineAPPLIED MATERIALS INC·Filed 2023·Application pending·0 cites
- 3454US11721728B2Self-aligned contactGLOBALFOUNDRIES US INC·Filed 2020·Granted Aug 8, 2023·0 cites·19 claims
- 3554US11329158B2Three part source/drain region structure for transistorGLOBALFOUNDRIES US INC·Filed 2020·Granted May 10, 2022·0 cites·19 claims
- 3654US11222844B2Via structures for use in semiconductor devicesGLOBALFOUNDRIES US INC·Filed 2020·Granted Jan 11, 2022·0 cites·20 claims
- 3754US2024072059A1Fdsoi device including self-aligned diffusion breakAPPLIED MATERIALS INC·Filed 2022·Application pending·0 cites
- 3853US11594441B2Handling for high resistivity substratesAPPLIED MATERIALS INC·Filed 2021·Granted Feb 28, 2023·0 cites·16 claims
- 3953US11164954B2Gate capping layers of semiconductor devicesGLOBALFOUNDRIES US INC·Filed 2019·Granted Nov 2, 2021·0 cites·20 claims
- 4053US11114466B2IC products formed on a substrate having localized regions of high resistivity and methods of making such IC productsGLOBALFOUNDRIES US INC·Filed 2020·Granted Sep 7, 2021·0 cites·20 claims
- 4153US10937685B2Diffusion break structures in semiconductor devicesGLOBALFOUNDRIES INC·Filed 2019·Granted Mar 2, 2021·0 cites·19 claims
- 4252US11664419B2Isolation method to enable continuous channel layerAPPLIED MATERIALS INC·Filed 2020·Granted May 30, 2023·0 cites·11 claims
- 4352US11545574B2Single diffusion breaks including stacked dielectric layersGLOBALFOUNDRIES US INC·Filed 2020·Granted Jan 3, 2023·0 cites·20 claims
- 4452US10833067B1Metal resistor structure in at least one cavity in dielectric over TS contact and gate structureGLOBALFOUNDRIES INC·Filed 2019·Granted Nov 10, 2020·0 cites·20 claims
- 4552US2018233566A1Field effect transistor structure with recessed interlayer dielectric and methodGLOBALFOUNDRIES INC·Filed 2018·Application pending·0 cites
- 4651US11728383B2Localized stressor formation by ion implantationAPPLIED MATERIALS INC·Filed 2020·Granted Aug 15, 2023·0 cites·10 claims
- 4751US11075298B2LDMOS integrated circuit productGLOBALFOUNDRIES US INC·Filed 2019·Granted Jul 27, 2021·0 cites·20 claims
- 4851US10832839B1Metal resistors with a non-planar configurationGLOBALFOUNDRIES INC·Filed 2019·Granted Nov 10, 2020·0 cites·20 claims
- 4951US10714380B2Method of forming smooth sidewall structures using spacer materialsGLOBALFOUNDRIES INC·Filed 2018·Granted Jul 14, 2020·0 cites·20 claims
- 5051US10026818B1Field effect transistor structure with recessed interlayer dielectric and methodGLOBALFOUNDRIES INC·Filed 2017·Granted Jul 17, 2018·0 cites·16 claims
Showing the top 50 of 68 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →