Inventor · disambiguated record
Vage Oganesian
Also filed as: OGANESIAN VAGE
136 granted patents·13 pending applications·1,760 citations·filing 2003–2021
99Inventor score
Top patents by PatentIndex Score
149 records- 0199US8076788B2Off-chip vias in stacked chipsHABA BELGACEM·Filed 2010·Granted Dec 13, 2011·74 cites·17 claims
- 0299US7901989B2Reconstituted wafer level stackingTESSERA INC·Filed 2008·Granted Mar 8, 2011·128 cites·16 claims
- 0398US8847376B2Microelectronic elements with post-assembly planarizationOGANESIAN VAGE·Filed 2010·Granted Sep 30, 2014·49 cites·28 claims
- 0498US8791575B2Microelectronic elements having metallic pads overlying viasOGANESIAN VAGE·Filed 2010·Granted Jul 29, 2014·87 cites·29 claims
- 0598US8598695B2Active chip on carrier or laminated chip having microelectronic element embedded thereinOGANESIAN VAGE·Filed 2010·Granted Dec 3, 2013·39 cites·29 claims
- 0698US8022527B2Edge connect wafer level stackingTESSERA INC·Filed 2010·Granted Sep 20, 2011·44 cites·17 claims
- 0797US9318385B2Systems and methods for producing flat surfaces in interconnect structuresTESSERA INC·Filed 2015·Granted Apr 19, 2016·12 cites·22 claims
- 0897US8796135B2Microelectronic elements with rear contacts connected with via first or via middle structuresOGANESIAN VAGE·Filed 2010·Granted Aug 5, 2014·45 cites·24 claims
- 0997US7935568B2Wafer-level fabrication of lidded chips with electrodeposited dielectric coatingTESSERA TECH IRELAND LTD·Filed 2006·Granted May 3, 2011·74 cites·28 claims
- 1097US7829438B2Edge connect wafer level stackingTESSERA INC·Filed 2007·Granted Nov 9, 2010·47 cites·8 claims
- 1197US7265440B2Methods and apparatus for packaging integrated circuit devicesTESSERA TECH HUNGARY KFT·Filed 2005·Granted Sep 4, 2007·70 cites·18 claims
- 1297US6972480B2Methods and apparatus for packaging integrated circuit devicesSHELLCASE LTD·Filed 2003·Granted Dec 6, 2005·184 cites·11 claims
- 1396US8432011B1Wire bond interposer package for CMOS image sensor and method of making sameOGANESIAN VAGE·Filed 2011·Granted Apr 30, 2013·27 cites·26 claims
- 1496US8405196B2Chips having rear contacts connected by through vias to front contactsHABA BELGACEM·Filed 2008·Granted Mar 26, 2013·33 cites·12 claims
- 1596US8310036B2Chips having rear contacts connected by through vias to front contactsHABA BELGACEM·Filed 2010·Granted Nov 13, 2012·27 cites·25 claims
- 1696US7791199B2Packaged semiconductor chipsTESSERA INC·Filed 2006·Granted Sep 7, 2010·49 cites·8 claims
- 1796US7495341B2Methods and apparatus for packaging integrated circuit devicesTESSERA TECH HUNGARY KFT·Filed 2007·Granted Feb 24, 2009·55 cites·23 claims
- 1895US8796800B2Interposer package for CMOS image sensor and method of making sameOGANESIAN VAGE·Filed 2011·Granted Aug 5, 2014·11 cites·4 claims
- 1995US8736066B2Stacked microelectronic assemby with TSVS formed in stages and carrier above chipOGANESIAN VAGE·Filed 2011·Granted May 27, 2014·17 cites·24 claims
- 2095US7642629B2Methods and apparatus for packaging integrated circuit devicesTESSERA TECH HUNGARY KFT·Filed 2007·Granted Jan 5, 2010·39 cites·7 claims
- 2194US8742541B2High density three-dimensional integrated capacitorsMOHAMMED ILYAS·Filed 2011·Granted Jun 3, 2014·16 cites·36 claims
- 2294US8728934B2Systems and methods for producing flat surfaces in interconnect structuresUZOH CYPRIAN·Filed 2011·Granted May 20, 2014·11 cites·23 claims
- 2394US8610259B2Multi-function and shielded 3D interconnectsOGANESIAN VAGE·Filed 2010·Granted Dec 17, 2013·15 cites·36 claims
- 2494US8604576B2Low stress cavity package for back side illuminated image sensor, and method of making sameOGANESIAN VAGE·Filed 2011·Granted Dec 10, 2013·16 cites·12 claims
- 2594US8502340B2High density three-dimensional integrated capacitorsOGANESIAN VAGE·Filed 2010·Granted Aug 6, 2013·15 cites·19 claims
- 2694US8431435B2Edge connect wafer level stackingHABA BELGACEM·Filed 2010·Granted Apr 30, 2013·12 cites·7 claims
- 2794US7936062B2Wafer level chip packagingTESSERA TECH IRELAND LTD·Filed 2007·Granted May 3, 2011·75 cites·23 claims
- 2894US7192796B2Methods and apparatus for packaging integrated circuit devicesTESSERA TECH HUNGARY KFT·Filed 2004·Granted Mar 20, 2007·86 cites·23 claims
- 2993US8692344B2Back side illuminated image sensor architecture, and method of making sameOGANESIAN VAGE·Filed 2012·Granted Apr 8, 2014·16 cites·14 claims
- 3093US8486758B2Simultaneous wafer bonding and interconnect joiningOGANESIAN VAGE·Filed 2011·Granted Jul 16, 2013·14 cites·48 claims
- 3193US7807508B2Wafer-level fabrication of lidded chips with electrodeposited dielectric coatingTESSERA TECH HUNGARY KFT·Filed 2007·Granted Oct 5, 2010·62 cites·21 claims
- 3292US8546900B23D integration microelectronic assembly for integrated circuit devicesOGANESIAN VAGE·Filed 2011·Granted Oct 1, 2013·12 cites·11 claims
- 3391US10157978B2High density three-dimensional integrated capacitorsTESSERA INC·Filed 2016·Granted Dec 18, 2018·5 cites·11 claims
- 3491US9123703B2Systems and methods for producing flat surfaces in interconnect structuresTESSERA INC·Filed 2014·Granted Sep 1, 2015·11 cites·25 claims
- 3591US8847380B2Staged via formation from both sides of chipOGANESIAN VAGE·Filed 2010·Granted Sep 30, 2014·10 cites·25 claims
- 3691US8759930B2Low profile image sensor packageOGANESIAN VAGE·Filed 2012·Granted Jun 24, 2014·9 cites·13 claims
- 3791US8637968B2Stacked microelectronic assembly having interposer connecting active chipsHABA BELGACEM·Filed 2010·Granted Jan 28, 2014·14 cites·33 claims
- 3890US9431475B2High density three-dimensional integrated capacitorsTESSERA INC·Filed 2013·Granted Aug 30, 2016·7 cites·17 claims
- 3990US8552518B23D integrated microelectronic assembly with stress reducing interconnectsOGANESIAN VAGE·Filed 2011·Granted Oct 8, 2013·10 cites·16 claims
- 4089US9437557B2High density three-dimensional integrated capacitorsTESSERA INC·Filed 2015·Granted Sep 6, 2016·5 cites·20 claims
- 4189US9233511B2Method of making stamped multi-layer polymer lensOGANESIAN VAGE·Filed 2012·Granted Jan 12, 2016·7 cites·3 claims
- 4289US9018725B2Stepped package for image sensor and method of making sameOGANESIAN VAGE·Filed 2011·Granted Apr 28, 2015·9 cites·2 claims
- 4389US8513789B2Edge connect wafer level stacking with leads extending along edgesHABA BELGACEM·Filed 2007·Granted Aug 20, 2013·10 cites·10 claims
- 4489US7479398B2Methods and apparatus for packaging integrated circuit devicesTESSERA TECH HUNGARY KFT·Filed 2007·Granted Jan 20, 2009·15 cites·21 claims
- 4588US9214592B2Method of making interposer package for CMOS image sensorOPTIZ INC·Filed 2014·Granted Dec 15, 2015·4 cites·10 claims
- 4688US7749886B2Microelectronic assemblies having compliancy and methods thereforTESSERA INC·Filed 2006·Granted Jul 6, 2010·13 cites·34 claims
- 4787US9666730B2Wire bond sensor packageOPTIZ INC·Filed 2015·Granted May 30, 2017·5 cites·16 claims
- 4887US9355948B2Multi-function and shielded 3D interconnectsTESSERA INC·Filed 2014·Granted May 31, 2016·6 cites·18 claims
- 4987US9269692B2Stacked microelectronic assembly with TSVS formed in stages and carrier above chipTESSERA INC·Filed 2014·Granted Feb 23, 2016·5 cites·22 claims
- 5087US8709913B2Simultaneous wafer bonding and interconnect joiningTESSERA INC·Filed 2013·Granted Apr 29, 2014·7 cites·20 claims
Showing the top 50 of 149 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →