Copper etching integration scheme

Abstract

The present disclosure relates to a method for forming an interconnect structure. In some embodiments, the method may be performed by forming an opening within a sacrificial layer. The sacrificial layer is over a substrate. A conductive material is formed within the opening and over the sacrificial layer. The conductive material within the opening defines a conductive body. The conductive material is patterned to define a conductive projection extending outward from the conductive body. The sacrificial layer is removed and a dielectric material is formed surrounding the conductive body and the conductive projection.

What is claimed is: 
     
       1. A method for forming an interconnect structure, comprising:
 forming an opening within a sacrificial layer, the sacrificial layer being over a substrate; 
 forming a conductive material within the opening and over the sacrificial layer, wherein the conductive material within the opening defines a conductive body; 
 patterning the conductive material to define a conductive projection extending outward from the conductive body; 
 removing the sacrificial layer; and 
 forming a dielectric material surrounding the conductive body and the conductive projection. 
 
     
     
       2. The method of  claim 1 , wherein the removing of the sacrificial layer exposes a sidewall of the conductive body. 
     
     
       3. The method of  claim 1 , wherein the sacrificial layer comprises a homopolymer or copolymer. 
     
     
       4. The method of  claim 1 , wherein the removing of the sacrificial layer exposes an upper surface of the substrate. 
     
     
       5. The method of  claim 1 , further comprising:
 depositing a hard mask layer over the sacrificial layer; 
 patterning the hard mask layer to form a patterned hard mask layer; and 
 etching the sacrificial layer according to the patterned hard mask layer to form the opening in the sacrificial layer. 
 
     
     
       6. The method of  claim 1 , further comprising:
 forming a patterned photoresist layer over the conductive material; and 
 etching the conductive material according to the patterned photoresist layer to define the conductive projection. 
 
     
     
       7. The method of  claim 1 , wherein the conductive material comprises copper and manganese. 
     
     
       8. The method of  claim 1 ,
 wherein the conductive projection comprises angled sidewalls that give the conductive projection a width that decreases as a distance from the conductive body increases; and 
 wherein the conductive body laterally extends past the angled sidewalls of the conductive projection. 
 
     
     
       9. The method of  claim 1 , further comprising:
 concurrently forming a barrier layer over the conductive body and the conductive projection after the removing of the sacrificial layer. 
 
     
     
       10. The method of  claim 9 , wherein the barrier layer comprises a self-forming barrier formed by annealing the conductive body and the conductive projection at a temperature of greater than approximately 200° C. 
     
     
       11. The method of  claim 9 , wherein the barrier layer continuously extends along sidewalls and upper surfaces of the conductive body and the conductive projection. 
     
     
       12. A method for forming an interconnect structure, comprising:
 etching one or more sacrificial materials over a substrate to define an opening extending through the one or more sacrificial materials; 
 forming metal within the opening and over the one or more sacrificial materials, wherein the metal within the opening defines a metal body; 
 selectively etching the metal to define a metal projection extending from the metal body, wherein the metal projection is set back from sidewalls of the metal body; 
 removing the one or more sacrificial materials to expose opposing sidewalls of the metal body; and 
 forming a dielectric material surrounding the metal body and the metal projection. 
 
     
     
       13. The method of  claim 12 , further comprising:
 performing a planarization process to remove the dielectric material from directly over the metal projection and to expose a topmost surface of the metal projection. 
 
     
     
       14. The method of  claim 12 , wherein the metal completely covers the one or more sacrificial materials prior to the selectively etching of the metal. 
     
     
       15. The method of  claim 12 , further comprising:
 removing the one or more sacrificial materials using one or more of etching, wet stripping, annealing, ultraviolet (UV) radiation, and infrared (IR) radiation. 
 
     
     
       16. The method of  claim 12 , wherein the metal projection comprises angled sidewalls, which cause a width of the metal projection to decrease as a distance from the metal body increases. 
     
     
       17. The method of  claim 12 , further comprising:
 concurrently forming a barrier layer over the metal body and the metal projection after the removing of the one or more sacrificial materials. 
 
     
     
       18. A method for forming an interconnect structure, comprising:
 forming an opening within a sacrificial material over a substrate; 
 forming a conductive material within the opening and over the sacrificial material; 
 patterning the conductive material to define upper sidewalls that protrude outward from horizontally extending surfaces of the conductive material; 
 removing the sacrificial material; and 
 forming a dielectric material around the conductive material. 
 
     
     
       19. The method of  claim 18 , wherein the upper sidewalls of the conductive material are tapered so that an upper width of the conductive material above the horizontally extending surfaces decreases as a distance from the substrate increases. 
     
     
       20. The method of  claim 19 , wherein the conductive material has lower sidewalls below the horizontally extending surfaces, which are tapered so that a lower width of the conductive material below the horizontally extending surfaces increases as the distance from the substrate increases.