Finfet semiconductor device structure with capped source drain structures

Abstract

A semiconductor device structure is provided. The semiconductor device structure includes a substrate having a base and a first fin structure over the base. The semiconductor device structure includes an isolation layer over the base. The first fin structure is partially in the isolation layer. The semiconductor device structure includes a first gate structure over and across the first fin structure. The semiconductor device structure includes a first source structure and a first drain structure on the first fin structure and on two opposite sides of the first gate structure. The first source structure and the first drain structure are made of an N-type conductivity material. The semiconductor device structure includes a cap layer covering the first source structure and the first drain structure. The cap layer is doped with a Group IIIA element.

What is claimed is: 
     
       1. A semiconductor device structure, comprising:
 a substrate having a base and a first fin structure over the base; 
 an isolation layer over the base, wherein the first fin structure is partially in the isolation layer; 
 a first gate structure over the first fin structure; 
 a first source structure and a first drain structure on the first fin structure and on two opposite sides of the first gate structure, wherein the first source structure and the first drain structure are made of an N-type conductivity material; and 
 a cap layer covering the first source structure and the first drain structure, wherein the cap layer is doped with a Group IIIA element, and wherein the cap layer adjacent to a top surface of the first source structure is thicker than the cap layer adjacent to a bottom surface of the first source structure. 
 
     
     
       2. The semiconductor device structure as claimed in  claim 1 , wherein the cap layer is made of silicon germanium. 
     
     
       3. The semiconductor device structure as claimed in  claim 1 , wherein the Group IIIA element is boron. 
     
     
       4. The semiconductor device structure as claimed in  claim 1 , wherein the N-type conductivity material is silicon phosphorus. 
     
     
       5. The semiconductor device structure as claimed in  claim 1 , wherein the substrate further has a second fin structure over the base, and the semiconductor device structure further comprises:
 a second gate structure over and across the second fin structure; and 
 a second source structure and a second drain structure on the second fin structure and on two opposite sides of the second gate structure, wherein the second source structure and the second drain structure are made of a P-type conductivity material, and the second source structure and the second drain structure are doped with the Group IIIA element. 
 
     
     
       6. The semiconductor device structure as claimed in  claim 5 , further comprising:
 a dielectric layer over the isolation layer, the first source structure, the first drain structure, the second source structure, and the second drain structure, wherein the first gate structure and the second gate structure are embedded in the dielectric layer; and 
 an isolation structure between the first gate structure and the second gate structure, between the first source structure and the second source structure, and between the first drain structure and the second drain structure, wherein the isolation structure passes through the dielectric layer. 
 
     
     
       7. The semiconductor device structure as claimed in  claim 6 , wherein the isolation structure is in direct contact with the first gate structure, the second gate structure, the cap layer, the dielectric layer, and the isolation layer. 
     
     
       8. The semiconductor device structure as claimed in  claim 6 , wherein the cap layer extends into the isolation structure, and the cap layer separates the isolation structure from the first source structure and the first drain structure. 
     
     
       9. The semiconductor device structure as claimed in  claim 6 , wherein the cap layer is in direct contact with the first source structure, the first drain structure, the isolation layer, and the isolation structure. 
     
     
       10. The semiconductor device structure as claimed in  claim 7 , wherein the isolation structure is further in direct contact with the second source structure and the second drain structure. 
     
     
       11. The semiconductor device structure as claimed in  claim 5 , wherein a first average concentration of the Group IIIA element in the cap layer is less than a second average concentration of the Group IIIA element in the second source structure and the second drain structure. 
     
     
       12. The semiconductor device structure as claimed in  claim 11 , wherein the first source structure and the first drain structure are doped with a Group VA element, and the first average concentration of the Group IIIA element in the cap layer is less than a third average concentration of the Group VA element in the first source structure and the first drain structure. 
     
     
       13. The semiconductor device structure as claimed in  claim 1 , further comprising:
 a contact plug passing through the cap layer and penetrating into the first source structure to be electrically connected to the first source structure. 
 
     
     
       14. A semiconductor device structure, comprising:
 a substrate having a base and a first fin structure over the base; 
 an isolation layer over the base, wherein the first fin structure is partially in the isolation layer; 
 a first gate structure extending across the first fin structure; 
 a first stressor and a second stressor on the first fin structure and on two opposite sides of the first gate structure, wherein the first stressor and the second stressor are made of an N-type conductivity material; 
 a cap layer covering a first top surface and a first sidewall of the first stressor and a second top surface and a second sidewall of the second stressor, wherein the cap layer is doped with a Group IIIA element; and 
 an etching stop layer covering the cap layer, the first stressor, and the second stressor, wherein the cap layer separates the etching stop layer from the first stressor and the second stressor. 
 
     
     
       15. The semiconductor device structure as claimed in  claim 14 , wherein the substrate further has a second fin structure over the base, and the semiconductor device structure further comprises:
 a second gate structure over and across the second fin structure; and 
 a third stressor and a fourth stressor on the second fin structure and on two opposite sides of the second gate structure, wherein the third stressor and the fourth stressor are made of a P-type conductivity material, and the third stressor and the fourth stressor are doped with the Group IIIA element; 
 a dielectric layer over the isolation layer, the first stressor, the second stressor, the third stressor, and the fourth stressor, wherein the first gate structure and the second gate structure are embedded in the dielectric layer; and 
 an isolation structure between the first gate structure and the second gate structure, between the first stressor and the third stressor, and between the second stressor and the fourth stressor, wherein the isolation structure passes through the dielectric layer. 
 
     
     
       16. The semiconductor device structure as claimed in  claim 15 , wherein the cap layer and the first stressor extend into the isolation structure. 
     
     
       17. The semiconductor device structure as claimed in  claim 15 , wherein the cap layer is in direct contact with the isolation structure. 
     
     
       18. The semiconductor device structure as claimed in  claim 16 , wherein the third stressor extends into the isolation structure. 
     
     
       19. The semiconductor device structure as claimed in  claim 14 , wherein the cap layer is thinner than the etching stop layer. 
     
     
       20. A semiconductor device structure, comprising:
 a substrate having a base and a fin structure over the base; 
 an isolation layer over the base, wherein the fin structure is partially in the isolation layer; 
 a first gate structure over the fin structure; 
 a first source structure and a first drain structure on the fin structure and on two opposite sides of the first gate structure, wherein the first source structure and the first drain structure are made of an N-type conductivity material; 
 a cap layer covering the first source structure and the first drain structure, wherein the cap layer is doped with a Group IIIA element; 
 an etching stop layer over the isolation layer and the cap layer; 
 a dielectric layer over the etching stop layer; and 
 an isolation structure passing through the dielectric layer and the etching stop layer, wherein the cap layer extends into the isolation structure.